X-bit labs

AMD: Per Aspera Ad Astra (page 7)

Category: CPU

by Victor Kartunov

[ 03/31/2004 | 06:54 AM ]

A Lesson in Math

The subsequent development of the situation differs for the two variants of speeding up the HyperTransport bus.

Variant A: 1000 = 200x5

This variant is more probable as its implementation calls for no significant platform redesign, we only have to change the multiplier for the base frequency.

Everything else is quite predictable: there will be two platforms, Socket 754 and Socket 939 (and Socket 940, gradually leaving the desktop market). The first is single-channel, the second is dual-channel (Socket 940 is a dual-channel platform too, but its main purpose is servers). The number of memory channels is the key difference between the two platforms, high-performing and the budget one. According to latest rumors (particularly, exposed at Anandtech.com), the nomenclature of models will look like that:

In fact, the nomenclature of Socket 754 models shouldn’t change so we don’t publish it here. Socket 939 variants are also predictable: the frequencies grow by 200MHz, the models add 300+ points to their names. Note that processors for the Socket 939 have higher numbers than their Socket 754 counterparts (the frequency being equal, but Socket 754 CPUs having larger cache). Supposing that the increase of 300 points in the model number equals to 10% performance growth, we have that Socket 939 systems will be faster than their Socket 754 counterparts by 5%. These numbers are an approximation, of course. Note also that the L2 cache is 512KB for Socket 939 CPUs (the Newcastle core).

Using DDR500 memory, we can easily determine the resulting memory frequencies from the fact that the memory divisor in Athlon 64 CPUs can only be an integer number:

The memory divisor is in the brackets