Support of Four Double-Sided DDR400 SDRAM Memory Modules

The integrated memory controller of the Athlon 64 processors is a pretty tricky thing. As soon as first CPU supporting two memory channels appeared, a lot of small unpleasant trifles began to pop up. It turned out that the relatively high workload on the controller created by the memory modules causes certain issues when Athlon 64 works in a system with four memory modules installed. If the Athlon 64 based system featured 4 memory DIMMs, the CPU could drop their working frequency, increase their timing settings, or simply refuse to work at all.

To be fair I have to say that the server buddy of Athlon 64 aka Opteron doesn’t have any of the above described problems because it works with more expensive registered memory modules. However, it doesn’t make much sense to use these modules in the desktop systems, therefore the users have to put up with some limitations once they decide to install more than two memory modules in their computer.

In fact, all these problems are being solved little by little, do there is no need to panic. If you remember, older Athlon 64 processors based on 130nm cores didn’t support 4 double-sided DDR400 SDRAM modules working at 400MHz frequency at all and reduced their frequency to 333MHz automatically. The today’s processors based on 90nm cores offer us a few better solutions. The D core revision also known as Winchester allows using four double-sided DDR400 memory DIMMs if the Command Rate timing is set to 2T.

Command Rate parameter determines how many clock cycles it is going to take for the memory modules to be able to receive the next command from the memory controller after it has been submitted. This timing may be increased if the address and command bus gets loaded really heavily when the signal transfer frequency of this bus is very high. Keeping in mind that the controller, memory modules and connecting wiring cannot be of 0 capacity, it will take some time to stabilize the logical level when the bus status is checked. Therefore, higher Command Rate parameter increased from 1T to 2T simplifies the work of the memory controller and adds to the system reliability at the expense of its performance rate.

Even before the E core revision had been released, some rumors circulated that this new core will allow giving up the 2T timing in systems with 4 double-sided memory modules. However, unfortunately, this has never happened. The CPUs based on this core can work with DDR400 SDRAM with 1T timing setting in all configurations except the one when we have 4 memory modules installed with at least two double-sided ones. And taking into account that most of the widely spread memory modules with 512MB capacity are double-sided, you can easily come across this particular situation with 4 double-sided DIMMs in the system.