Closer Look at Core 2 Duo E8600
In terms of formal specifications, the new Core 2 Duo E8600 didn’t go too far away from its predecessor. Compared with the Core 2 Duo E8500 that has been the top dual-core Intel processor in the lineup until recently, the clock frequency of the new CPU got only 166MHz higher. Other parameters, such as system bus frequency and L2 cache size remained the same. As for the higher core frequency, they managed to increase it simply by raising the default multiplier to 10x.
The screenshot from the diagnostic utility refreshes our memory with the pretty familiar Wolfdale processor specifications. The Core 2 Duo E8600 bus frequency equals to 1333MHz traditional for the E8000 family, and the L2 cache is 6MB big. There are no surprises in the electrical and thermal parameters, too: the TDP of the new processor is set at a typical value for dual-core CPUs - 65W.
The distinguishing feature of the new Core 2 Duo E8600 is its processor stepping. It changed from C0 to E0, which suggests that the new CPU may boast some new features and functionality. We have every right for these expectations, and Intel describes the innovations introduced in the new E0 processor stepping as follows:
Besides the evident changes in SSpec and CPUID, they also claim that new processors use Halide free packaging and feature innovations reducing system power consumption during low activity. They support PSI signal that the CPU sends out in Deeper Sleep mode. This way the mainboard will be able to lower the power losses in the processor voltage regulator circuitry in idle mode. For example, some advanced mainboards supporting PSI will be able to switch the processor voltage regulator into single-phase mode in this case. For almost the same reason they are going to introduce ACNT2 support – a new software mechanism for determining the processor’s energy status.
New processor stepping will also bring in the long-awaited support modification for the PECI interface that provides access to DTS – digital thermal sensors built into the processor core. I dare hope that these modifications will help free new Wolfdale processor from the widely-spread problem with locked sensor readings.
Here I would like to add that dual-core processors with E0 stepping support new XSAVE and XRSTOR instructions intended to save and restore parameters of the FPU/SSE unit. These new instructions should be primarily beneficial to developers of virtual machine monitor software.
Of course, the exterior looks of the new processors reflects the internal differences of the new E0 stepping. Although the difference is truly minor, you can easily notice it: the components on the bottom of the CPU have been slightly rearranged: