Intel Core Microarchitecture: the Basics
According to a well-known formula popularized by AMD back in the days when they introduced their processor rating system, the performance is processor clock frequency multiplied by the number of instructions the CPU can perform in a single clock cycle. This way there are two major ways of increasing the processor performance: by raising the clock speeds and by increasing the number of instructions processed per clock cycle. The first parameter is pretty clear, while the second parameter is determined by the internal CPU structure and depends on the number of functional units such as instructions decoders and execution blocks.
Moreover, there is one more way to speed up your CPU: reduce the number of operations needed to process the same amount of data. A great illustration of the progress made in this direction is the SSE, SSE2 and SSE3 SIMD instructions that allow completing vector operations in no time.
As for the power consumption, it is processor clock frequency multiplied by processor Vcore2 and by constant dynamic capacity that is determined by the CPU microarchitecture and depends on the number of transistors and their activity during CPU operation.
As a result we can conclude that the developers need to focus on establishing a balance between the number of instructions the CPU can process per clock cycle and dynamic capacity in order to optimize the microarchitecture in terms of the best ratio between the performance and power consumption. Processor Vcore also has serious effect on the performance-to-power consumption ratio, however, it hardly depends on the microarchitecture and is determined mostly by the manufacturing process. The clock frequency doesn’t affect this ratio at all. So, these ideas were all taken into account when Intel developed Core Microarchitecture.
Basing on the requirements we have just listed above, Intel engineers decided to give up NetBurst (which is actually not surprising at all) in favor of mobile processors microarchitecture, because these processors, developed from Pentium Pro, Pentium II and Pentium III boast relatively high performance level and are very economical in terms of power. However, the new Core microarchitecture has been significantly improved and enhanced in order to deliver higher performance, wider range of features and lower power consumption. As a result, it would be absolutely incorrect to claim that the prospective processors will be none other but adapted (for the new applications field) Pentium M.