One of the major events of the upcoming year 2005 in the CPU market should inevitably be the release of the dual-core processor architecture. To cut the long story short, the idea behind dual-core CPUs is very simple. One processor physically based around a single semiconductor die will feature two equally functional processor cores.
In other words, it will be a dual-processor system packed into a single processor casing. Right now the processor developers consider this way of increasing the processors performance and functionality to be very promising. As a result, not only the two leading CPU developers, such as AMD and Intel, but also the VIA Company are planning to start introducing single-silicon dual-core CPUs in the upcoming year 2005.
In fact, the idea to put two processor cores onto a single physical die is not that new in this industry. In the end of last century the high-end multi-processor server developers, such as HP or IBM already pointed out the potentially prospective possibility of designing a CPU including two computational dies. As a result of significant progress made in this field there appeared dual-core HP PA8800 and IBM Power4 processors, which have been successfully used in different server solutions like IBM eServer pSeries 690 or HP 9000 until nowadays.
However, we wouldn’t call these products mass products. Since they are pretty expensive, they have never got that widely spread. Why? Well, take for instance the die size of the dual-core IBM Power4 processor with 128MB L3 cache memory, which is equal to 115x115mm. So, I would not call processors such as IBM Power4 and HP PA8800 “real” predecessors of the upcoming dual-core processor solutions from Intel and AMD.
Nevertheless, the mere idea of splitting the computational process into several parallel threads within a single CPU is not that new even for the desktop solutions. Intel undertook the first steps in this direction in the year 2002, when they first launched their Xeon and Pentium 4 processors supporting Hyper-Threading technology. The idea of Hyper-Threading technology implies that the processor based around one physical computational die emulates two independent CPUs working in SMP mode (symmetric multiprocessing).
In fact, the CPU supporting Hyper-Threading technology has a very small number of duplicated functional units: registers (including general purpose and managing registers), Advanced Programmable Interrupt Controller (APIC) and some service registers such as Next Instruction Pointer, for instance. All other resources, including caches, execution units, branch prediction logic, bus controller, etc. are shared between the two logical CPUs. This trick allows single processor silicon to process two threads of calculations simultaneously, because the second virtual core uses processor resources undemanded by the first virtual processor. Contemporary CPUs equipped with a few parallel execution units turn out more efficient fur to Hyper-Threading technology, because it allows loading the execution units more evenly.