Intel Conroe

The last processor to be tested is the newest, not yet officially announced processor from Intel codenamed Conroe. We are going to test an engineering sample of this CPU which has a clock rate of 2400MHz and a shared 4MB cache. Here are the results:

Pic.24: Intel Conroe. Sequential reading of non-modified data loaded into the other core.

Pic.25: Intel Conroe. Random reading of non-modified data loaded into the other core.

Pic.26: Intel Conroe. Sequential reading of the data loaded and modified in the other core.

Pic.27: Intel Conroe. Random reading of the data loaded and modified in the other core.

What strikes the eye immediately is that the graphs are similar to the Yonah’s but with different latencies.

First, the read latency corresponds to the L2 cache latency when reading the unmodified data (Picture 24, 25). What’s interesting, there are different L2 cache latencies at sequential and random data reads: 12 cycles at sequential (Picture 24) and about 14 cycles at random reading (Picture 25). I don’t yet know the real latency of the cache and the reasons for this difference may be explained after more tests.

Second, when reading the modified data there is a considerable increase of latency if the data modified by the other core fully fit into its L1 data cache – just like with the Yonah, but the value of the increase is much smaller (Picture 26, 27). The step-like pattern is also observed when the delay chain is long; the steps are 9 cycles high which corresponds to the CPU frequency multiplier (Picture 27).