X-bit labs

LGA775: New CPUs and Chipsets (page 7)

Category: CPU

by Ilya Gavrichenkov

[ 06/21/2004 | 06:57 PM ]

As for the on-die termination, the bus terminating resistors intended for damping the signals reflected from the bus ends are now located not on the mainboard but inside the memory chips. On the one hand, it allows improving the actual termination process, and on the other to reduce the mainboard production cost as there is no need to install a lot of resistors around the DIMM slots any more.

DDR2 DIMM modules look very similar to DDR memory:

However, DDR2 DIMMs are definitely incompatible with the older slots. They differ from the traditional DDR DIMM modules at least by the number of pins. While DDR SDRAM modules feature 184 pins, the DDR2 DIMMs have 240 of them. At the same time note that the physical dimensions of the DDR2 memory modules (height and width) are absolutely identical to those of DDR modules.

DDR SDRAM modules (top) and DDR2 SDRAM modules (bottom).

DDR2 SDRAM chips are designed in FBGA package, which is stated very clearly in the specs. The new chip packaging allows improving heat dissipation and minimizing the EMI imposed by the chips on one another. Besides the new chip packaging (as you know most DDR SDRAM chips were packed in TSOP), DDR2 SDRAM chips feature lower power voltage and as a result dissipate about 30% less heat. In particular, this is one of the reasons there can be designed DDR2 chips of higher capacity than in case of the regular DDR SDRAM.

To conclude out story about the new DDR2 SDRAM, which will now be supported by the new Pentium 4 platforms based on i925 and i915 chipsets, I would like to say a few words about the peculiarities of the new dual-channel memory controller used in these sets of core logic. As we all remember, the memory controller integrated into the previous generation i875 and i865 chipsets had a pretty tricky configuring algorithm, so that it turned out a not very easy task to squeeze the maximum performance out of the boards based on them. The launching of i925 and i915 made things much simpler due to Flex Memory technology support. In fact, the memory controller of the new chipsets can work in three modes for both: DDR and DDR2 SDRAM. Here they are:

• Dual-Channel Symmetric. This mode is enabled when both controller channels are packed with the same amount of memory (in terms of capacity). This mode allows achieving the highest performance by taking full advantage of the 128-bit dual-channel data access. It is important however that there are no limitations as far as the configuration or number of memory modules in each channel is concerned. This is the key idea of the Flex Memory Technology optimizing the performance by easy memory subsystem configuring.
• Single Channel. This mode is involved when there are no memory modules in the DIMM slots referring to one of the channels.
• Dual-Channel Asymmetric. The memory controller works in this mode when we have different amount of memory on each channel. Although the system will try to take advantage of the dual-channel mode in this case, the performance will still be close to that of the single-channel mode.