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Prescott 2M Core: Different Cache Memory

Since larger L2 cache memory appeared one of the major innovations introduced in the Pentium 4 processors when they moved to Prescott 2M core, we are going to pay special attention to the L2 cache memory structure in our article.  In order to better understand how the L2 cache-memory is arranged in the new Prescott 2M core, we once again resorted to CPU-Z diagnostic utility. For a better comparison we are also offering you our older data obtained for the CPU on the regular Prescott core.


Prescott


Prescott 2M

As we see, Prescott 2M and Prescott have similar structure of the L2 cache memory. It is only the size of this memory that is different. The L2 cache of both cores has 8-way associativity and processes 64-byte long strings. However the same number of associativity ways for cache memory of different size automatically implies that it takes more time to perform data search in a larger cache. As a result, L2 cache of Prescott 2M based processors should be slower than that of the CPUs based on the regular Prescott core.

In order to check out this supposition we resorted to Cache Burst 32 utility. The testbed we used for this experiment was built on Intel Desktop D925XECV2 Board based on i925XE Express chipset and was equipped with dual-channel DDR2-533 SDRAM with 4-4-4-11 timings. For our tests we used Pentium 4 560 and Pentium 3 660 on Prescott and Prescott 2M cores respectively.

According to the obtained results, the L2 cache read speed is lower by Pentium 4 660 processor compared with what we see by Pentium 4 560 CPU with smaller L2 cache. At the same time the write speed and cache latency is the same in both cases. However when we copy data, the L2 cache memory of the Prescott 2M based processor appears somewhat faster than the cache memory of the CPU on the regular Prescott core.

This way we have to state that the increase in the L2 cache memory size by the new Pentium 4 6XX processors resulted into certain architectural changes, which affected the performance of the L2 cache during data processing. And this effect was not highly positive. Note that this has already happened to NetBurst architecture once, when they shifted from Northwood core to Prescott. So we have to point out one more time that increase in the L2 cache memory size is not very beneficial for its overall performance.

 
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