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InformationX-bit Labs for mobile users! Do not forget that we are running a special version of X-bit Labs web-site for users of mobile and handheld devices: http://pda.xbitlabs.com. Check out our news and articles from smartphones and PDAs to be always updated on the latest computer and technology news. <%BANNER[right_130x600]%>
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Articles: CPU
Intel Prescott: One More Willamette-like Slow Processor or a Worthy Piece? (page 8)Category: CPU [ 02/01/2004 | 12:01 PM ]
As we see, although Prescott boasts a larger L1 cache than Northwood, its bandwidth is somewhat lower, especially on writing. A similar thing happens to L2 cache bandwidth. However, when we compare the cache-memory bandwidths of Pentium 4 and Athlon 64 processors, the Intel solutions will be indisputable leaders due to wider bus between the L2 cache and the processor core. Here I have to point out one very curious detail. Even though Prescott’s cache-memory performs all reading and writing as fast as Northwood, the copy speed of the 90nm processor is considerably higher than by Northwood. This effect can be explained by the fact that data loading and storing by Prescott core have also been additionally improved, so that the CPU can start using the preliminarily stored data even before they have been moved to the cache. This is possible due to a special Store Forwarding Buffer. When we tested the processor’s work with the memory, we discovered another surprising fact. Prescott reads data from the memory faster than Northwood. The CPU owes this pretty tangible result to the improved Data Prefetcher, which we have already discussed above. Besides the bandwidth, we also care a lot about another parameter characterizing memory subsystem and caches: the latency.
Unfortunately, even a quick glance at this graph is more than enough to understand that the latency of L1 and L2 caches in the new Prescott processor has grown much higher compared with the previous Northwood core. And here are the numbers:
Yes, unfortunately, we have to state that not only the size of Prescott’s cache-memory has grown bigger, but also its latency. And the latency grew up a lot, I should say: for L1 cache the latency doubled! As a result, Intel will no longer be able to boast the extremely low latency of its L1 data cache. From the temporal point of view, the latency of Pentium 4’s L1 data cache got close to that of Athlon 64 L1 cache, though the latter is four times larger. However, the increase in the L1 cache latency is another forced measure, so that the new Pentium 4 processors on Prescott core could go beyond 4GHz core frequency. Similar changes were made to the L2 cache, too. In terms of L2 cache latency, the new Prescott processor yields to Northwood, as well as to the competing CPUs from AMD Athlon 64 family. Although theoretically the memory latency of the Prescott processor had to remain unchanged, we see that it got worse in this case too. As a result, we have to admit that hunting for the high clock frequency potential in its Prescott core, Intel sacrificed the latencies during the work with data. But on the other hand, we shouldn’t forget that Intel has also applied some new techniques aimed at improving the memory buses efficiency. And the higher bandwidth during data copying as well as higher data read speed from the memory are clear evidence of that. <%BANNER[banner_468x30]%>
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Category NewsCategory: CPU Thursday, July 24, 200811:06 pm Intel Rumoured to Speed Up Nehalem Launch on Desktop. Intel’s Bloomfield Processor to Emerge in September – Rumours Wednesday, July 23, 20083:35 pm AMD to Discuss Rival for Intel Atom Towards Year End. AMD’s Competitor for Intel Atom in the Works, Says Company Monday, July 21, 20088:46 am AMD Initiates Pilot Production of 45nm Chips. AMD to Bring 45nm Products in Early Q4 2008 Thursday, July 17, 20082:36 pm AMD’s Chief Executive Officer Hector Ruiz Steps Down. Dirk Meyer Becomes New Chief Exec of AMD 12:15 pm Intel: Atom Will Not Substitute Celeron Processors. Intel Denies Possibility to Change Celeron for Atom All Latest News <%BANNER[right_130x130_1]%>
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