Testbed and Methods

Since we have already studied the performance of Socket 754 Sempron processors against the competitor’s solutions in our previous reviews (take a look at the article called AMD Sempron 2600+ for Socket 754: K8 Architecture Made More Affordable, for instance), we will refrain from repeating all those results today. We will focus on the performance analysis of the new Sempron 3100+ based on E revision of 90nm Palermo core against the older Sempron 3100+ based on the 130nm Paris core. This will allow us to evaluate the effect from the enhanced memory controller of the new processor core, as well as the performance improvement resulting from the SSE3 instructions support.

For our performance tests we assembled the following testbed:

• CPUs:
  • AMD Sempron 3100+ (Socket 754, 1.8GHz, 256KB L2, Palermo);
  • AMD Sempron 3100+ (Socket 754, 1.8GHz, 256KB L2, Paris).
• Mainboard: DFI LANPARTY UT nF3 250GB (Socket 754, NVIDIA nForce3 250GB).
• Memory: 1024MB DDR400 SDRAM (Corsair CMX512-3200XLPRO, 2 x 512MB, 2-2-2-10).
• Graphics card: PowerColor RADEON X800 XT (AGP 8x, 500MHz/500MHz).
• HDD: Western Digital Raptor WD740GD (SATA150).
• OS: Microsoft Windows XP SP2.

Performance

Here are the benchmark results:

The obtained results are pretty logical. The new Sempron 3100+ is not that much faster than its older analog. In fact, we didn’t expect anything else, because otherwise, AMD would have simply increased the processor rating of the already existing CPUs on Palermo core.

The average advantage of the E core revision over the CG core revision doesn’t go beyond 1-2%. This is exactly the performance improvement to expect from the enhancements made to the new processor memory controller. Although, in some cases the performance advantage could be even bigger than that. For example in games, the performance of the CPU based on the new Palermo core could grow up by 5%. It looks like AMD intended all memory controller optimization to first of all affect the gaming performance of its CPUs, which has always been a trump of K8 architecture.

Note that against the background of the performance gain provided by the memory controller enhancements, the performance improvement cause by the SSE3 instructions support is almost null. In fact, the new command support in the Sempron 3100+ processor remains practically unnoticed: benchmarks using SSE3 do not stand out in any way among all other tests. Nevertheless, note that these are the benchmarks that do use SSE3 instructions: SuperPi test, Doom III game, Mainconcept MPEG Encoder and DivX codecs, and ScienceMark benchmark. However, the performance improvement we observe in all these tests can be also considered the contribution of the enhanced memory controller. In other words, the SSE3 instructions support implemented in Sempron 3100+ processor is more of a marketing move, rather than a feature that should affect the processor performance.

Anyway, we wouldn’t complain about the SSE3 instructions and their implementation in AMD processors. There are still too few applications out there that actually use these instructions. There should be new tasks coming out where SSE3 instructions will have much bigger influence on the performance. Especially, since it turns into a worthy stimulus toward active implementation of SSE3 instructions for the software developers. Once AMD Athlon 64 and Sempron processors acquired SSE3 instructions support, we can state that all CPUs currently available in the market are fully SSE3 compatible.