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Now let’s review another way of organizing a 2-way system, which is called “point-to-point”. The following illustration shows its principal difference from the previous variant:

You can notice that each processor is now connected to the chipset only, instead of being connected to one shared bus. As a result, each processor can use the entire bus bandwidth. All highs and lows of this multiprocessor system organization ensue from this fact: this system is more efficient as the processors don’t directly compete for the data bus. Besides that, such a system, unlike the previous one, puts less strict demands on the processor electrical parameters. The shared bus needs the processors to have the same electrical parameters or to be simply identical, which is even better. In the point-to-point scheme the processors don’t necessarily have to be the same, although following this recommendation will help you avoid some potential problems. On the other hand, this system is harder to implement as you actually have to wire two buses instead of one. More contacts are also necessary; such systems usually require complex multi-layer PCBs (to avoid electromagnetic interference between the two buses) and, accordingly, cost more. We should also note that such systems have a higher competition for memory access, i.e. higher memory load. Examples of such systems are the Alpha platform from DEC, the company who was the first to use this organization, and the modern Athlon MP platform from AMD.

The last architecture is switch-based. We can explore it by the example of the 8-way ProFusion platform from Intel.

As you see, this variant looks like two 4-way platforms “stuck” together. The chipset, which is the joint piece, works as a switch. In fact, there can be several levels of such switches: these eight processors can be attached to another eight with one more switch. The processors don’t have to be eight either. A modification is possible when several CPUs on a daughter card are united with one switch and are then attached to a higher-level switch and so on.

In fact, all truly multiprocessor machines (8 and more CPUs) follow this switch architecture. Each “brick” can be based on the shared bus architecture (as in multiprocessor Itanium-based systems) or the “point-to-point” one as in the Opteron-based Red Storm from Cray. Anyway, this method allows building systems with more processors than would be possible otherwise.

 
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