by Anna Filatova
09/14/2011 | 09:58 AM
As we know, we are about to witness not only the arrival of the new Intel enthusiast platform known as LGA2011, but also a refresh of the LGA1155, in which the new Ivy Bridge processors will replace the current Sandy Bridge ones. According to Intel’s “tick-tock” strategy, this won’t be a new generation of microarchitecture, but a mere die-shrink. However, this will be a fundamentally new process, as not only will it be 22 nm, but will also use Tri-Gate Transistors.
However, as we remember from our previous experience, during the transition to new manufacturing process Intel can’t resist the temptation to enhance a few things in the corresponding microarchitecture, so the new CPU generation won’t be just a simple die-shrink, but more of an enhanced version.
Today at IDF in San Francisco Intel officials shared a little about the innovations they are going to offer us with the arrival of Ivy Bridge, in an attempt to get the current owners of LGA1155 systems excited about the upcoming new processors and make them really look forward to the opportunity to upgrade.
So what can we expect? Intel engineers primarily focused on the following key features:
At the same time, the basic configuration principles of the new Ivy Bridge are going to remain exactly the same as in Sandy Bridge. In other words, the new processors will not only retain the Ring Bus, L3 cache memory (which will become larger, by the way) and an integrated graphics core, but all of these will also fit into the same semiconductor die.
Moreover, Intel confirmed that Ivy Bridge will remain pin-compatible with Sandy Bridge processors, so the compatibility will solely depend on the mainboard BIOS. Of course, the launch of Ivy Bridge will be accompanied by the arrival of a few new chipsets. However, their primary purpose will be not to provide the new processors with their own specific platform, but to offer native USB 3.0 support and a few other storage-related features based on RST 11.
However, let’s not veer too far away from the topic of our article and continue to the major innovations.
First of all, the new production process will allow Intel to significantly lower the heat dissipation. And it is actually not only due to the transition to 22 nm, but also due to the involvement of Tri-Gate Transistors. These transistors allow eliminating leakage currents very effectively. In pure numbers, Intel claims that the performance-per-watt is going to almost double compared with what we got from Sandy Bridge. It is going to be really great, because Intel intends to aggressively promote Ultrabooks, which require energy-efficient and at the same time powerful processors. So, the arrival of Ivy Bridge should really stimulate the progress in this direction significantly.
It was specifically with Ultrabooks in mind that they decided to integrate DDR3L memory support into their current memory controller. DDR3L is the memory with lower power consumption that uses only 1.35 V voltage feed. And we are talking not just about lower signal voltages, but also about the ability to shut off I/O power to DDR memory in deep sleep states.
But the absolute killer feature in the upcoming Ivy Bridge, which will be related to heat dissipation, will be configurable TDP and Low Power Mode.
As you know, each currently available Intel processor has a clearly identified TDP, within which the frequency may sometimes be increased with the help of Turbo Boost technology. Ivy Bridge processors will have three TDP options for each CPU model: the minimum TDP, the nominal TDP and the maximum TDP. It means that with proper cooling and sufficient power supply the CPU can significantly exceed its nominal frequency without any concerns for the limitations of the nominal TDP. This is something that the Turbo Boost technology the way it is today doesn’t allow, because it is closely connected with the TDP settings. The opposite is also true: if for whatever reason you need to save some power, then you can always switch the processor TDP to a lower level.
Of course, this technology is targeted primarily for mobile use, where it will be in great demand. It will certainly work in parallel with Enhanced Intel SpeedStep and Turbo Boost. The major difference in this case is that EIST and Turbo Boost are independent technologies, while configurable TDP works in manual mode only. In other words, the user himself will be also to switch the TDP modes using a special switch on the laptop, or it will be done via special proprietary software developed and supplied by the notebook makers themselves.
Another Intel’s trick with Low Power Mode implies that in this mode Intel engineers want to replace the common system agent algorithms with new ones. According to the developers, in this mode the processor will try to save as much power as possible by distributing all computational threads among as few cores as they can in order to switch as many cores as possible into power-saving mode. In regular operational modes the computational threads are evenly distributed among the cores to improve the system response time.
In reality overclockers’ biggest issue with the LGA1155 platform is that there is no straight-forward way to overclock anything by simply adjusting the BCLK frequency. And so far it looks like things will hardly be any different in Ivy Bridge. However, Intel didn’t give up on overclockers and introduced four pretty useful features.
First, the maximum multiplier for the new Ivy Bridge processors will be x63 instead of x57, as it used to be. As a result, those who like to play with liquid nitrogen will be able to achieve much higher frequencies. But nevertheless, we are not talking about anything like 8.4 GHz, which AMD Bulldozer turned out capable of.
Secondly, Intel is going to make their memory controller support much faster DDR3 SDRAM. The fastest DDR3 SDRAM Sandy Bridge currently supports is DDR3-2133 memory, but they promise us we will be able to use up to DDR3-2800. There is currently no memory like that available in the market, but Intel believes that DDR3 can easily hit these speeds.
Thirdly, we should get a smaller adjustment increment for the memory frequency than the 266 MHz that we have today. According to Intel, it should be no more than 200 MHz.
But the most interesting thing is the ability to dynamically adjust the processor clock frequency multiplier without a system reboot. It means that there will appear multiple utilities, which will allow not only overclocking the processor easily, but also using some unique algorithms to adjust the processor frequency, for example, depending on the operational load or temperature. In other words, Intel wants to give advanced users something like a configurable Turbo Boost with software control.
At this point Intel claims that their new integrated graphics core will be significantly more advanced than the current Intel HD Graphics 2000/3000 cores. It is very important to understand that in this aspect, we don’t have just a regular microarchitectural “tick”. On the graphics side it more like a "tick and a half", because it will have microarchitectural enhancements, alongside with new features, improved heat dissipation and power consumption.
Even if we don’t go too deep into details, things seem really great from the user prospective. In particular, the graphics performance is expected to increase by about 60%, which may put Ivy Bridge side by side with Llano, i.e. Intel will be offering us a fully-functional APU of their own. Moreover, it will be so mature that it will even support DirectX 11 – the today’s latest API, and even OpenCL 1.1 via the GPU. It is particularly important, because in this case Ivy Bridge will allow using graphics cores to solve computational tasks – a feature that AMD APUs have from day one.
The graphics core microarchitecture is shown on the slide below:
As we can see, Intel split the graphics core into 5 domains: Global Assets (including Geometry front-end), Slice Common (including the rasterizer and pixel back-end), Slice (shaders), Codex and Media, and Displays. In fact, this domain layout has been implemented to make it easier for the developers to work with each domain separately in order to improve the overall performance for the new core modifications based on the same microarchitecture, as well as cutting off individual blocks for lower-cost modifications.
The microarchitectural improvements also include the straight-forward increase in the number of execution units aimed at increasing the overall performance. Sandy Bridge has a maximum of 12 units, while Ivy Bridge will have a maximum of 16. Moreover, each of these units will be able to process two instructions per clock cycle. Also, they intent to add an individual L3 cache to the graphics core, which will also have a positive effect on performance. Besides, the graphics core acquired hardware tessellation units and Shader Array support (which, actually, ensures the compatibility with Shader Model 5.0 and DirectX 11). In any case, Intel intends to improve graphics performance compared with what we received from Sandy Bridge by about 60%, and we don’t see anything that cold prevent them from doing it.
In fact, we only mentioned a few major improvements to be introduced in the new graphics core, but there will also be a lot of minor improvements there. The next slide from the today’s presentation will describe them best:
You may be wondering, what about Quick Sync? Of course, Intel didn’t forget about it and Ivy Bridge is going to bring us a second version of this technology. It will offer better performance and additional features applied during video stream processing, such as color and contrast enhancement filters, for example. As for the transcoding speed, Ivy Bridge should work about twice as fast as Sandy Bridge. And by the way, the new Quick Sync version will support multi-view codec, which is a key-feature for stereoscopic 3D support.
Of course, image display functionality will also become much more advanced. If the new Ivy Bridge processors are used in the mainboards built on the upcoming core logic sets, they will be able to display image on three independent monitors (while Sandy Bridge supports only two). Ivy Bridge will also support HDMI 1.4 with Stereo 3D.
If we look at the actual Ivy Bridge cores, we will see that they boast a few microarchitectural improvements. They are not too numerous, but there are a few things we should point out at this time.
One thing we were especially interested in was the introduction of a hardware random numbers generator to be integrated into the upcoming Ivy Bridge, which will be truly irreplaceable in cryptographic tasks.
Here we are talking not about a pseudo-random generator producing numbers according to a certain mathematical algorithm, but about a true random numbers generator that uses a physical process with indeterminate states. They often use Geiger counter for this, but Intel came up with an algorithm based on indeterminate states of a complex semiconductor circuitry. It allows generating high flow of random numbers in total accordance with cryptographic standards.
Another extremely important innovation is Supervisory Mode Execute Protection (SEMP), which should help against Escalation of Privilege (EoP) type of attacks. The main idea of this innovation is to prevent an alien application from invading the OS services with higher privileges. To solve this task the memory employed by user applications will have a special flag, which will prevent these applications from running in supervisor mode.
And of course, there will be a number of minor innovations, which are described in the following slide:
Of course, the story of Ivy Bridge we shared with you today doesn’t cover everything. In fact, we only got a quick look at what is going to be “under the hood” and received a few performance teasers. Ivy Bridge is claimed to be 20% faster, but we don’t know yet what part of this increase will result from higher clock frequencies. At this point there are no actual performance numbers, frequencies, prices or model names officially released. And there is a good reason for that. Intel has pushed the launch date for Ivy Bridge a little back. As of now these processors are scheduled to come into production by the end of the year, but will be officially launched in March-April of 2012, which is still 6 months away.
The only exact number, which is publicly available at this time is the number of transistors inside the Ivy Bridge die. They will increase to 1.45 billion. It means that the upcoming processors will be 45% more complex than Sandy Bridge and a significant contribution to the transistor count will come from the graphics core. It will now occupy more than 30% of the semiconductor die.
So, there will obviously be more interesting details about Ivy Bridge processors yet to come and it is not the last Ivy Bridge article on our site.