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InformationX-bit Labs for mobile users! Do not forget that we are running a special version of X-bit Labs web-site for users of mobile and handheld devices: http://pda.xbitlabs.com. Check out our news and articles from smartphones and PDAs to be always updated on the latest computer and technology news. <%BANNER[right_130x600]%>
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Articles: Editorial
February 2004 Hardware News Overview (page 3)Category: Editorial [ 02/23/2004 | 06:37 PM ] The new Intel’s core for the Pentium family processor, code-named Tejas, is also rumored to have some problems. Sources say it is much hotter than the Prescott, which is far from being a cool guy itself, to put it mildly. The Tejas is said to delay from the Q1 of 2005 (where it was postponed from the Q4 of 2004) to the Q2. This pause will be filled by the arrival of the 4.2GHz version of the Prescott. Well, it would be a nice opportunity for AMD if AMD meets its schedule for once and releases the 90nm Athlon 64/Opteron chips in time. Those rumors also suggest that the server counterpart of the Tejas, the Jayhawk, is also postponed to the Q2 of 2005, but this is actually one and the same core. The 90nm Celeron will hopefully have a better fate than its full-fledged Pentium 4 E mates, considering the deficit of such value processors. Intel is trying hard to promote its high-performance Pentium solutions in the first hand, although the market seems to have had them enough, while the demand for low-cost processors with high frequency and exciting performance is always quite high. So it is the more pleasant that the first 90nm Celerons are coming along with the 90nm Pentium 4 in early February, with frequencies ranging from 2.53GHz to 2.8GHz and a doubled (256KB) L2 cache. Overall, 533MHz processor system bus and 256KB of L2 cache are both appealing options, and Intel will have to stifle it once again. As for the upcoming server processors, another representative of the 90nm Prescott generation is going to rise up in the near future. This spring, the 90nm Xeon on the Nocona core comes to us with 1MB of L2 cache and (first ever on Xeon!) the 800MHz FSB. This cache size is just the starting point, I guess. I hope the energy consumption of chips on the Nocona core will remain acceptable. Otherwise, I’m afraid just to think of the power consumption (and heat dissipation) of the 64-processor server on Xeons IBM is promising to roll out at the beginning of the next year. Curiously enough, this application of the Xeon is not quite in accordance with Intel’s own ideology, which places only the Itanium at the high end. Well, last year Intel sold about 100 thousand Itanium 2 chips – not bad for processors designed for high-end servers. But the Itanium has been on the market for more than 3 years now, no surprise that its sales are picking up these days. However, there is something Intel Itanium 2 lacks and that holds customers from acquiring the pretty expensive hardware and need for investing in software – poor performance in 32-bit mode. In the middle of January the company unveiled an IA-32 Execution Layer (EL) to work above the operating system and to raise the efficiency of Itanuim’s execution of 32-bit code by 50-70% (Intel’s estimates). Anyway, x86 IA-32 instructions are converted into IA-64 ones on the software level, with the unavoidable performance degeneration.
That’s why the most important episode of the last month was the rumor that Intel would give up completely and show the Yamhill technology at the February IDF – their own 64 bits for x86 processors. <%BANNER[banner_468x30]%>
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