X-bit labs

Intel Developer Forum Fall 2006. Day 1 (Continued) (page 4)

Category: Editorial

by Anna Filatova

[ 09/27/2006 | 09:04 AM ]

Need for Speed and Density

There are three keys to achieving this goal: reaching teraops performance, terabytes bandwidth and terabits I/O. These three objectives are the base of Intel’s terascale research program.

Yesterday we have already reported about the prototype wafer for 80-core chips and Justin Rattner revealed a little bit more details to that. 80 cores produce one teraflop of computer performance. It delivers energy efficiency of 10 gigaflops per watt:

Adequate memory bandwidth for this computing power – involves stacking of the memory chips directly underneath the processor chips. There are 256MB of static ram for each core that can deliver 2 trillion bytes per second data transfer rate.

The last piece is the I/O bandwidth. Intel continues to make advancements in electrical signaling. Today the research has arrived at optical signaling stage. The project launched 5 years ago. In 2004 they already introduced a 1Gbit/s modulator. The 10Gbit/s modulator has been recently demonstrated to the public. But the research continues, so there will be more achievements to come.

Another breakthrough in the silicon photonics - one electrically pumped hybrid-laser:

Intel can combine 4 lasers like that on a single die:

For the first time they have publicly demonstrated 4 hybrid silicon lasers at work. The lasers were individually tuned and linked into the modulators. The signal is then fed into a single optical fiber (that replaces numerous cables) and additional photo-detectors are used to recover the signal.

Of course we all understand the significance of this development: we all know that photonics has incredible capacity. This is a more affordable compatible approach for the technology that will offer higher data transfer rates.