Scalable Link Interface Explained
NVIDIA’s Scalable Link Interface, dubbed SLI, is a set of hardware and software capabilities that allows two PCI Express x16 graphics cards to work in parallel and deliver higher performance compared to one such graphics card would. NVIDIA is currently pretty tight-lipped about the technology itself, though, there are still some information that is available for general public.
NVIDIA GeForce 6800-series' die with SLI logic
Each GeForce 6-series graphics processor has special circuitry inside that allows it to work in pair with other GPU (or GPUs?). Graphics cards based on the GeForce 6 chips will have a special MIO port to connect one graphics card for another. NVIDIA explains that when two graphics cards work in parallel, each one renders half of the frame. The frame is divided dynamically in a way to share the workload as 50:50 between the graphics processors and, when all calculations are done, synchronize the parts and send them to the screen.
NVIDIA calls the technology of splitting frames between GPUs as “Dynamic Load Balancing” while the whole mechanism is called Symmetric Multi Rendering.
NVIDIA's Symmetric Multi Rendering with Dynamic Load Balancing
The dynamic load balancing is done by the upcoming ForceWare drivers and needs some additional processing power from the CPU. Once the driver splits the frame into two parts, it sends both to different GPUs. Once the GPUs get the data, they start to compute their parts of the frame. Both chips are likely to communicate via the special MIO port, however, not actual graphics data is likely to be send via this port because it can hardly provide enough bandwidth. Instead, the “master” chip sends certain commands to the “slave” chip ordering to send the half of the frame via PCI Express bus, or the “slave” reports that “he’s done”. In theory, MIO port is not that necessary and may be substituted by PCI Express x16 itself, however, it seems that the MIO makes everything just a little bit more efficiently and saves a number of clocks for the PCI Express bus, especially keeping in mind that today’s PCI Express applications seem not to support full-duplex mode allowing to perform read and write operations at the same time. The MIO port is most probable serves for frame-lock purposes as well.
MIO connector, front
At this point it is not clear how NVIDIA plans to “divide” data for pixel and vertex shaders between the parts of the frame as well as carry out other calculations requiring coordinates from different parts of the screen, e.g., Z-test, occlusion culling, etc, with the SLI technology. It is possible that when splitting the frame the software leaves certain areas to be calculated by two GPUs at the same time, but this is not something that is confirmed at this time.
MIO connector, back
PCI Express bus may seem to be a bottleneck in the whole SLI configuration, but NVIDIA claims astonishing efficiency of its Symmetric Multi Rendering technology – around 87% or even 100%, which definitely makes great impression and brings confidence in the technology. Since the number of transactions required between GPUs is nor clear, as well as the sizes of data chunks need to be transacted, it makes sense to wait and see the actual SLI applications.