Articles: Graphics
 

Bookmark and Share

(60) 
Pages: [ 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 ]

Specifications, Features and Peculiarities of NVIDIA GeForce 6800/6800 Ultra

NVIDIA’s last-generation graphics processors based around the NV30/NV35 architecture differed from ATI’s R300/R350 chips in higher flexibility, but the advantage in functionality of pixel processors led to a pretty slow shaders execution. This remains a sore spot of the CineFX/CineFX 2.0 architecture and GeForce FX chips in their competition with RADEON 9xxx graphics processors.

When developing the next-generation processor, NVIDIA couldn’t help relying on the previous experience. Of course, the company couldn’t stand a situation when solutions from its main rival were faster in nearly every price sector, in spite of NVIDIA’s formal technological superiority. That’s why besides further functionality enhancements and the introduced support of version 3.0 pixel shaders, they tried to give a performance boost to the NV40 and to enforce the weak sides of the CineFX architecture.

Here are the basic characteristics of the NVIDIA GeForce 6800 Ultra GPU in comparison with top-end graphics processors of the previous generation (NVIDIA GeForce FX 5950 Ultra and ATI RADEON 9800 XT).

 NVIDIA GeForce 6800 UltraNVIDIA GeForce FX 5950 UltraATI RADEON 9800 XT
Process technology0.13 micron0.13 micron0.15 micron
Transistor Count220 million125 million110 million
GPU clock-speed400MHz475MHz412MHz
Memory controller256 bit DDR/GDDR2/GDDR3256 bit DDR SDRAM256 bit DDR SDRAM
Memory clock-speed1100 (550) MHz950 (475 DDR) MHz730 (365 DDR) MHz
Peak theoretical memory bandwidth35.2GB/s28.3GB/s21.8GB/s
Maximum memory size512MB?256MB256MB
AGP interfaceAGP 3.0 4x/8xAGP 3.0 4x/8xAGP 3.0 4x/8x
Pixel processors, Pixel Shaders
Pixel shader version3.02.x2.0
Max number of pixels per clock1648
Max number of Z-values per clock3288
Number of TMUs1688
Static loops and branchingyesnono
Dynamic loops and branchingyesnono
Max number of textures per shader161616
Max number of texture instructionsn/a102432
Max number of arithmetic instructionsn/a102464 (+64)
Max number of instructions per shadern/a102496 (+64)
Registersn/a2 color registers,
512 (1024) constant registers,
8 texture coordinates registers,
16 TMU identification registers,
16 (32) temporary registers,
4 resulting color registers,
1 resulting Z register
2 color registers,
32 constant registers,
8 texture coordinates registers,
16 TMU identification registers,
12 temporary registers,
4 resulting color registers,
1 resulting Z register
Data representation formatsFixed point?; 16-bit float; 32-bit floatFixed point; 16-bit float; 32-bit floatFixed point; 16-bit float; 32-bit float
Internal pixel shader pipeline precision128-bit pixel precision; 32-bit float precision; 16-bit float precision128-bit pixel precision; 32-bit float precision; 16-bit float precision96-bit pixel precision; 24-bit float precision;
Multiple Render Targetsyesnoyes
FP Render Targetyesnoyes
Texture filtrationsBilinear, trilinear, anisotropic, trilinear + anisotropicBilinear, trilinear, anisotropic, trilinear + anisotropicBilinear, trilinear, anisotropic, trilinear + anisotropic
Max level of anisotropic filtering16x8x16x
Vertex processors, vertex shaders
Vertex shader version3.02.x2.0
Number of vertex processors634.0
Static loops and branchingyesyesyes
Dynamic loops and branchingyesyesno
Max number of instructions per shadern/a256256
Max number of instructions with loops extensions65536?6553665536
Registers 16 input registers,
16 temporary registers,
256 constant floating-point registers,
256 constant integer registers,
256 Boolean registers,
1 address register,
1 loops counter register,
8 output registers for texture coordinates,
1 fog color output register,
1 vertex position output register,
1 pixel size output register,
2 output registers for diffuse/mirror color component
16 input registers,
12 temporary registers,
256 constant floating-point registers,
16 constant integer registers,
16 Boolean registers,
1 address register,
1 loops counter register,
8 output registers for texture coordinates,
1 fog color output register,
1 vertex position output register,
1 pixel size output register,
2 output registers for diffuse/mirror color component
Data representation formats32-bit floating point32-bit floating point32-bit floating point
Texture read from vertex shaderyesnono
Tesselationnonono
Full Scene AntiAliasing
FSAA MethodsSupersampling, multisampling, rotated-grid multisampling?Supersampling, multisampling, ordered-grid supersampling, ordered-grid multisamplingRotated-grid multisampling
Number of samples2..82..82,4,6
Technologies aimed at higher memory bandwidth efficiency
Hidden Surfaces Removal (HSR)yesyesyes
Frame-buffer, z-buffer, texture compressionyesyesyes
Fast Z-clearyesyesyes

The list of parameters and features is impressive: this is a new-generation solution from any point of view. The pixel pipeline can output up to 16 pixels per clock cycle; there are 6 vertex processors – any competitor should beware of that power. The CineFX 3.0 architecture supports shaders version 3.0, a new full-screen anti-aliasing method, an improved anisotropic filtering algorithm, Ultra Shadow II technology for faster processing of shadows in next-generation games like Doom III. High-Precision Dynamic-Range technology allows building scenes with a high dynamic lighting coefficient.

Now let’s take a closer look at the basic characteristics of the NVIDIA NV40.

 
Pages: [ 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 ]

Discussion

Comments currently: 60
Discussion started: 04/14/04 11:23:23 AM
Latest comment: 12/24/06 03:48:25 PM

View comments

Add your Comment