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Articles: Memory

Choosing the Right Memory for Core 2 Duo Platform - Part 1 (page 4)


Category: Memory

by Ilya Gavrichenkov

[ 09/08/2006 | 05:05 PM ]


Pages : 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12

Bandwidth vs. Latency

We first measured the bandwidth and latency of the memory subsystem in synthetic benchmarks.

As you can see, memory types with different theoretical bandwidths do not differ much in practice. For example, there is a 100% difference in theoretical bandwidth between DDR2-533 and DDR2-1067 whereas the difference between the practical results obtained with those memory types is 17% at maximum.

This poor performance of fast DDR2 SDRAM is due to the architecture of Core 2 Duo systems in which memory is connected to the CPU via the chipset and two sequential buses. In this design it is not the bandwidth of dual-channel high-frequency memory that becomes the bottleneck, but the Quad Pumped Bus that connects the CPU with the chipset's North Bridge. Its maximum theoretical bandwidth is 8.5GB/s in Core 2 Duo systems, which only equals the bandwidth of dual-channel DDR2-533 SDRAM. That's why we don't see a really big performance growth if we use memory faster than DDR2-533.

It seems it doesn't make any sense to use memory faster than DDR2-533 on the Core 2 Duo platform. This is not quite so. Memory access latency decreases along with frequency, which can be seen in practical tests.

Here, the results differ much more. Like the bandwidth, the latency should have a considerable effect on system performance in many applications and may justify the use of high-frequency memory in a computer with a Core 2 Duo processor.

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