1.
Just a minor typo on page 2:
"A great illustration of the progress made in this direction is the SSE, SSE1 and SSE3 SIMD instructions that allow completing vector operations in no time."
I believe it is supposed to say "SSE, SSE2, and SSE3."
Nice article. I wonder if AMD has anything else besides its 4x4 plan?
"A great illustration of the progress made in this direction is the SSE, SSE1 and SSE3 SIMD instructions that allow completing vector operations in no time."
I believe it is supposed to say "SSE, SSE2, and SSE3."
Nice article. I wonder if AMD has anything else besides its 4x4 plan?
[Posted by: angryfirelord
| Date: 06/29/06 06:26:15 PM]
| Date: 06/29/06 06:26:15 PM]


