3.
Luckily for AMD, in regards to the DDR-II memory controller issue, DDR-I is still capable of operating at significantly higher frequencies than AMD's current 400Mhz memory bus. There's still alot of headroom, with supporting modules already out on the maket, left in DDR-I so AMD (provided they can do this without an official JEDEC standard beyond PC3200) has the option of scaling up their current on-die DDR-I controllers, buying them some time to engineer DDR-II controllers into their later K8 core revisions.
Theoretically, as their yields with 0.13 micron SOI process improve, their memory controllers, being parts of the core itself, will be capable of higher frequencies proportionately with the rest of the chip as time passes. I don't see any reason, once they get a sufficient handle on 0.13 SOI process to upscale clockspeeds, beyond the need for JEDEC approval why AMD couldn't make synchronous use of DDR466 memory if it can't implement a DDR-II controller imediately.
Currently it's rare that someone can OC Athlon 64/FX FSB beyond 215Mhz (430 DDR) but in a few months to a year, with BIOS revisions and process improvements, the cores should be capable of stock FSB of 233Mhz (466DDR). If this is possible it will reduce the performance lead, and therefore the need for DDR-II which I understand will be introduced at 533Mhz.
Memory makers have shown that they can make memory at higher-than-spec speeds. All we need to see is some memory controllers capable of the same speed and since it's now on the chip (At least in AMD's case) people upgrading to a higher fsb won't need to buy a new chipset/motherboard.
[Posted by: Phat Bastard | Date: 12/03/03 01:15:27 AM]