3.
The analysis of the article is pretty good...but I find certain comments are simply not feasible from an engineering perspective.
First off...AMD has been so busy just trying to get a working processor up to speed for the marketplace...it has found little time to write optimizations, let alone add instructions! Also...the 64bit processors will be very expensive to produce mainly because all the added functionality for 64bit processing such as increased addressability and more tricks with instructions is strictly not necessary for the current generation...personally I see amd's product as the step in the right direction, but they simply won't be able to make it as great in life as it is on paper...the athlon has had a similar fate. I would currently equate the approach to ati’s current R3xx processor being produced without any significant optimizations (ati avoided this with much improved drivers)…clearly the idea is one thing and making the idea a reality an entirely different problem.
Look at the number of units for fp and other intensive processing and the athlon clearly has much more power than the pentium 4...in some cases 3x as much...but why isnt this showing? The answer lies not simply in software optimization but largely on architectural decisions. The athlon and the K8 are both superscalar designs with tons of raw power...but from a computer engineering prospective amd and intel could both improve the performance 2 fold without increasing the processor frequency a bit or even moving to a more advanced manufacturing process for more advantages, and i think this topic was partially touched in the article...amd and intel both could optimize on the hardware level if they just look to tackle the difficult tasks, but as these companies got to make money...they choose to solve the easier problem. The result is better performance but nothing incredible. As of late…I have felt that intel has paid greater attention to these harder problems (e.g. hyper-threading) and amd has just kinda gone with the tide – adopting new standards in processor design (exception: x86-64).
Anyway…I’m pretty sure that intel will keep on increasing the stages in their pipeline and someday will adopt x86-64…I just don’t see how x86-64 is a bad idea…x86 was never the best isa but it has lasted the test of time and everyone’s so accustomed to it. Also, there is plenty of improvements and headroom left in x86 as seen by everyone’s complaints that it doesn’t this wrong and I can’t do that.
My guess that Prescott will have 25stages and then tejas(I think that’s the next one…) will have 30+. But you’ve gotta remember that though the longer the pipeline means more painful branch mis-predictions, each processor that brings a longer pipeline will have better branch predictors, trace caches, micro-ops, and buffers that make the longer pipeline seem much shorter. Also the larger level 1 and level 2 caches on Prescott and then probably I’m guessing a L3 cache as well on the tejas will be of much use…remember that though a 4.2+GB/s bus is fast, its nothing compared to the 100+GB/s that caches will be approaching.
Also, intel has clearly developed really good ways to use large amounts of cache without draining lots of power (e.g. Pentium M)…so I wouldn’t be surprised about Prescott’s running at 4Ghz with cool temps w/o the use of special low-d materials or soi (but instead strained silicon). Speaking of soi, I’ve heard several times that if you ever ask a intel rep why they aren’t using soi, they immediately tell you it’s the worst idea ever for current processes. They claim that the crystalline structure can be damaged by the soi process and requires the structure to be restored...I don’t understand it completely but that may be why amd paid ibm something like 50million to fix their soi problems. Hopefully, amd( or ibm) can get it to work because the benefits are incredible.
Going back to what the article suggested at the conclusion…it would not be a good idea for amd to use intel’s compiler because the optimizations for the intel processor is very specific and though it would add large increases in performance due to SSE/2 instructions, other problems and instabilities would cause too many problems. Intel has found that writing a great compiler to take advantage or their architecture and give it to developers, results in much faster adoption of new improvements. Yes, Intel spends a lot of time and money on the compiler, but the increased sales more than make up for it. I’m sure amd will come to the point where they realize that they will need to do the same in order to stay competitive as a business (i.e. profits not losses). Though many people will keep on complaining that intel’s product doesn’t have as high an IPC as amd’s product, the fact is in everyday applications the intel processor is cheaper to produce, a better overall implementation including chipsets, and usually higher performing.
The article also mentioned that intel will have no competition and so its prices will be higher. I also disagree with this notion because amd and intel will become more and more competitive in the future and prices today are a result of supply, demand, and input costs. amd sells their barton chips at traditionally non-amd like prices because they must do so in order to stay alive. I strongly believe that the aggressive pricing before will come back once demand grows beyond supply when the industry turns around. In the future I see that the consumer can only benefit as computing becomes cheaper and better and competition increases.
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Posted by: guest

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Date: 03/27/03 09:02:59 PM]