Ok, this thread is bound to confuse a lot of people because there is a lot of incorrect information here, so let me chime in with some points.
1) The L2 cache is for both code and data. For code, the opcodes defined by AMD64 do NOT double in size to 64 bits! Most opcodes themselves haven't changed from IA32. A lot of opcodes are still just 1 byte! Secondly, not all opcodes operate with 64 bit immediate operands either. Most in fact default to 32 bit operands and require a 1 byte prefix to the opcode to tell the cpu this opcode is using 64 bit operands. In other words, being in 64bit mode does NOT imply that the cpu will need twice as much cache just to break even for code. Code size will increase because of the prefix for opcodes using 64 operands, along with the 64bit operands themselves, along with some of the newer opcodes, but under almost all circumstances, code size WILL NOT double! AMD claims the size increase will only be ~10%. Even if they are grossly wrong we still aren't talking about anything more than a 25% to 35% increase, not 100%! Second, data size does not double either, only address pointers do. In 64 bit mode you can still manipulate 8/16/32 bit data without adding to the size of the opcode+operand (the operand being immediate data). If you manipulate 8 bit data for example using the older opcodes from the 8086, the immediate operand to the opcode is still only 8 bits! Data will grow more, since all address pointers will double in size, and a lot of data will be address pointers, but data won't double either.
2) Legacy media instructions (MMX, 3DNOW, SSE, and x87 floating point) are NOT restricted to legacy applications! Read the AMD64 Programmer's manual on x87 usage. You CAN use x87 floating point along with the SIMD operations of SSE2 at the same time! FYI: MMX and 3DNOW are opcodes that operate on data thats kept in the 80 bit floating point registers and some other FP control registers, so as far as AMD64 is concerned, MMX, 3DNOW and x87 floating point is all the "same thing". SSE/SSE2 however, uses DIFFERENT registers (128 bit XMM registers, and different control registers) which means there is nothing preventing the cpu from using both at the same time. Readers will please note that the document referenced by Harry is a document for MICROSOFT'S 64 bit version of Windows, it is NOT describing AMD's hardware, its describing how Microsoft's OS for AMD64 will work! Interestingly enough, the problem may be with their compiler technology, since at this point the open source GCC compiler also warns you that it doesn't handle very well the simultaneous use of multiple "function units" (MMX/3DNOW/x87 & SSE/SSE2), because until now GCC has assumed there is only one "mathematics coprocessor". AMD64 now has 2 completely independent ones, and even worse, both can work on either integer OR floating point data! GCC will handle this better eventually, its just a matter of extending the compiler's internal architecture, so why MS can't do this I don't know, they probably have their own reasons (related to Windows's internal architecture?) for wanting to prevent simultaneous use of both x87 and SSE2. Well, thats what you get for using a MS OS! :) Anyone using Linux/BSD (and future versions of GCC) will not have this limitation.
3) Clarification of "floating point precision". Precision is referred to as either "single", "double", or "double-extended". These 3 definitions allow for 24, 53, or 64 bits of precision in the fractional part of the number. Yes, only the x87 FP unit can do the later kind of FP math, but frankly most applications do just fine, thank-you-very-much, with 54 bit fractional precision, only extreme cases of scientific computing need that much precision, and the truth is most of this kind of computing is done on non-PC hardware that supports a whopping 128 bits of fractional precision. So I don't see this lack of 64 bits of fractional precision in SSE2 as the end-of-the-world as Harry does (never mind that, as I pointed out above, you CAN use x87 FP if you need the double-extended precison - at least in Linux). SSE2 supports double precision FP but unlike x87 FP, it can operate on *4* different floating point numbers at the SAME time (SSE is also known as SIMD instructions, which means "Single Instruction - Multiple Data"), so there are VERY good reasons to use SSE2 instead of x87 FP, and for most apps on a PC, you won't notice the difference.
4) Finally, here at the end I'm going to lose my cool a little :), and say that Harry's claim that AMD64 is an "ugly 64 bit processor" is utter bullshit, IMO. AMD64 is designed to extend the IA32 instruction set to 64 bits, unlike Intel's Itanium which THROWS OUT the old IA32 instruction set. Now thats not necessarily a bad thing by itself, but the problem is what Intel has replaced the IA32 instruction set with! I've seen plenty of comments which seem to suggest that the latest Itanium isn't exactly the "prettiest" 64 bit processor either! :) Itanium is far more radical than AMD64, but the bottom line right now is that with AMD64 you can run both 32 bit and 64 bit applications at hardware speed (Itanium has to emulate IA32 for 32 bit code, plus other limitations), meaning you can "upgrade" to 64 bit computing without having to throw out all the software you have now and start over, and AMD64 hardware will be MUCH cheaper than Itanium 2 systems. Just try to find a *quote* on an IT2 cpu on the net! They aren't being sold separately, you can only get them in expensive servers from a few companies, meanwhile I can get an AMD64 right now for less than the price of Intel's best 32 bit cpu!
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Posted by: Ed

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Date: 01/01/04 02:50:30 PM]