Besides the discussions about the Prescott CPU at IDF, Intel revealed some juicy details about the next-generation NetBurst processor as well as platforms the company will promote in 2004. Just like we expected in October, Intel Tejas platform will feature PCI Express, DDR-II SDRAM memory and some other innovations.

According to market expectations (check this news-story) Intel plans to start transition to DDR-II SDRAM memory in late 2004 so that in 2005 DDR-II would become mainstream solution. The platform for the code-named Tejas processor is expected to be based on the PCI Express interface. Intel will also introduce its advanced audio-core currently known under the code-name Azalia. According to the latest details our Editor in Chief Anna Filatova managed to find out, the Azalia will support Dolby Digital sound, DVD Audio and SACD playback, improved speech recognition algorithms and the so-called multistreaming feature that enables us to listen two separate audio streams playing via two separate audio outputs on a single personal computer, as we mentioned yesterday (see this news-story).

We should point out that Intel will push the PCI Express interface massively to the market in 2004. Intel said that the new interconnection will be brought to various platforms and devices, including enterprise, desktop and mobile chipsets and platforms, network processors, fully featured I/O processors for high-performance RAID, Ethernet components, Ethernet adapters, storage subsystems, and server boards and platforms.

According to preliminary information, the Tejas chips will follow the Prescott CPUs on the market sometimes in the second half of 2004. Considering all the information we know about the platforms for Tejas, we can expect them to come in the very end of 2004, though, as it happens sometimes, Intel may change the initial plans dramatically. The Tejas is expected to support 1066 and 1200MHz Quad Pumped Bus and will scale its core-clock from about 5GHz in 2004 to approximately 7GHz in early 2006. Intel will certainly implement new instructions set and improve the CPU core once again.

More details concerning next-gen platforms and processors are expected to become available later.