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Even though there are no final Socket 478 Prescott chips so far, Intel demonstrates excellent execution and already provides different kinds of samples of the next-generation Tejas processor for evaluation by its partners. Furthermore, even now there are specifications of the upcoming CPU available, as VR-Zone managed to reveal.

As expected, Intel Tejas CPUs will come in the second half of 2004. The processor will be made using 90nm technology and will eventually be shrunk to 65nm fabrication process in 2005 or later. The initial die size of the 90nm chip is expected to be 120-140 square millimeters and from 80 to 100 square millimeters of the same die made using 65nm process.

A big advantage of processors code-named Tejas is its large caches. It is now said that the chip will have 24KB of L1 cache (Northwood – 8KB, Prescott – 16KB) and 1MB of L2 cache as well as 16K uOps Trace Cache (Northwood – 12K uOps). According to the report, the chips will still feature 800 or 1066MHz Quad Pumped Bus, but with possible scalability to 1200MHz, I would add, given that Intel boosted its Springdale/Canterwood specs nearly at the home stretch.

The Tejas is still a NetBurst processor, but with another set of major improvements, including even more advanced Hyper-Threading technology that may be able to carry more than two threads at once.

The initial platform for Tejas will be code-named Grantsdale with Socket T, dual-channel DDR-II memory at 400 and 533MHz in addition to dual-channel DDR memory at 400MHz support. The biggest improvement of the Grantsdale will be support for PCI Express, the warrior of the I/O systems for the next decade.

And there are pictures of the new processor from Intel over here. Apparently, besides a new kinds of socket and packaging, Intel will also implement a new IHS on its Tejas chip.

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