Intel Corporation is probably one of the most respected IT firms on the planet that manages to execute its roadmaps pretty flawlessly. Unfortunately, every rule has its exceptions and Intel may also run into problems that can become obstacles on the way of the world’s largest chipmaker. From the original timeframe in Q2 2003 Intel postponed the release on highly-acclaimed Prescott processor to Q4 2003, but, as we know already, the actual massive availability of the 90nm chips is expected to be in the late Q1 2004 or even a bit later. Such delays in Prescott ramp also impacted the release of the future-generation Tejas processor, a Japanese source reported this week.

Both Tejas and Prescott processors are based on Intel’s NetBurst architecture already utilized in Intel Pentium 4 processors. The Prescott and Tejas are expected to bring some advantages that include enhancements of the NetBurst paramount peculiarities that influence CPU performance the most. First of all, the L1 cache will be enlarged to 16 and 24KB in Prescott and Tejas processors respectively from Northwood’s 8KB. Secondly, Tejas and Prescott will include 16K uOps Trace Cache, a substantial improvement over Northwood’s 12K uOps. Thirdly, the L2 caches of Tejas and Prescott chips made using 90nm technology will be 1MB, while the 65nm Tejas is projected to have 2MB of L2. Additionally, in an attempt to lower the impact of deep-20+ stage pipeline on actual performance, Intel will implement a new, more efficient branch prediction mechanism in its forthcoming microprocessors. Finally, Intel will raise both core and PSB clocks, resulting in even faster computing speed of the next-generation NetBurst processors. Furthermore, following Intel’s recent general policy, presuppose enhanced efficiency of the Hyper-Threading technology as well as several new instructions (Prescott New Instructions, Tejas New Instructions) to optimize certain operations with every new generation of NetBurst chips.

As you see from the previous paragraph, Prescott and Tejas processors are extremely impressive from a lot of points – they become faster in terms of clock-speed and they become more efficient from architectural point of view. Unfortunately, since they turn out to be faster in Megahertz, they consume more power than predecessors; since bottlenecks of NetBurst architecture are considerably enhanced, transistor count increases, and, at the end, it is trickier to manufacture such chip.

We witnessed earlier this year how Intel had to start augment the Vcore of its 90nm Prescott microprocessors making them incompatible with already existing infrastructure. At this point we see that this was only the beginning – the company has to rework its Socket T CPU and platform specifications for the same purpose. This Japanese web-site reveals that Prescott processors in LGA775 form-factor will already typically consume up to incredible 120W!

High CPU power consumption may lead to a lot of different and unlikable effects in the microprocessors. We already know what electromigration effect is, based on the Northwood example, later we may face the same on other microprocessors as well. Regrettably, this is a vicious circle for Intel here: it needs to pump up the core voltage to pump up the clock-speed, but, at the same time, keep power consumption [and heat dissipation] at allowable level; otherwise, it will have to enhance the thickness of dielectric under transistor gate and channel to avoid dielectric breakdown or tunnel effect – a measure that is used by some other CPU makers and that holds the core-frequencies from increasing further at some point. Certainly, there is a way for Intel to solve the issues, but it takes time and the company may have to reschedule the implementation of some of its projects. 

In order to better understand problems of today’s semiconductor manufacturing, please read our article titled “Production Technologies: Behind the Scenes”.

Based on the objections mentioned herein and according to unofficial sources, I believe that Intel will launch the Tejas processor in mass-quantities only in early 2005, but not in late 2004, as previously reported. At least, there are reports about 3.60GHz Prescott delay to Q2 from Q1 and, as a consequence, the delay of Prescott 3.80GHz to Q3 plus 3.80GHz+ move into Q4, resulting in the Tejas actual launch in the first quarter of 2005.

At this point there is no information about potential rearrangements of Intel’s server plans.