UPDATE: Intel denied that the dual-core Xeon processors were postponed and emphasized that the firm actually revealed the server dual-core product timeframe for the first time.

Intel Corporation announced on Tuesday a detail of its roadmap that causes some products to be delayed substantially from the originally designated timeframes, saying that the company’s multi-core processors for mainstream servers – Intel Xeon – with two processing cores, will emerge in 2006.

Intel’s original plans included the release of single-core code-named Jayhawk Xeon processor in the first half of 2005. The Jayhawk was expected to be a superset of the currently shipping Nocona chip with some tweaks on the architecture levels. The Jayhawk core was projected to boast the same micro-architecture as a desktop chip code-named Tejas that would continue quantitative and qualitative boosts of NetBurst specifications. The chip were projected to have 24KB L1 cache, 16K uOps Trace Cache, 1MB L2 cache, a more efficient branch prediction mechanism, a new set of instructions known as “Tejas New Instructions” as well as improved Hyper-Threading organization and so on. Both Tejas and Jayhawk projects were cancelled earlier this year in order to concentrate forces on dual-core products presumably targeted for release at roughly the same timeframes the Tejas and Jayhawk were supposed to be out at. However, it appeared that the firm did not want the observers to expect Xeon dual-core products in 2005.

“The first dual-core Intel Xeon processor for a dual processor system is due in the first quarter of 2006. We are putting our resources around a number of dual and multi-core plans that definitely contrast competitive plans, including three priority projects next year that focus on desktop and mobile PCs and our high-end Itanium line which will be both dual core and multi-threaded,” an Intel spokesman told X-bit labs.

While Intel officials briefly describe long-term future, they remain tight-lipped over not-too-distant projects, denying to comment on products that the company plans to release instead of the canned Jayhawk.

Earlier this year unofficial sources said Intel was looking forward to offer 1066MHz bus for its 2-way Intel Xeon processors along with code-named Blackford and Greencreek chipsets as well as appropriate Xeon processors in mid-2005. Earlier in 2005 the company is projected to roll-out its revamped Intel Xeon “Irwindale” chips with 800MHz PSB and 2MB of L2 cache, up from 1MB on today’s chips.

Also next year Intel will release revamped Intel Xeon MP processors code-named Potomac and Cranford with enlarged caches and 667MHz processor system bus.

At the most recent IDF show, Intel, who holds the lion’s share of the server and workstation markets, disclosed another three enterprise projects, including Whitefield, multi-core Xeon; Tulsa, a dual-core Xeon MP; and Montvale, a multi-core Itanium product. Intel said that by 2007 its Xeon and Itanium 2 processors will be compatible on the infrastructure and socket levels.