World’s largest supplier of x86 microprocessors for servers and workstations – Intel Corp. – on Monday officially confirmed its plans to release new multiprocessor platform as well as supporting chips in the first half of the year. The introduction of the actual products is set to be scheduled within 90 days from now.
Santa Clara, California-based Intel Corp. plans to introduce its first 64-bit Intel Xeon processor MP processor-based platform with up to 8 MB of a third-level “L3” cache memory reservoir, codenamed “
According to previously released information, Intel’s Xeon processor family for multiprocessor (MP) applications will be updated already in Q1 2005 with chips code-named Cranford that contain 1MB of L2 cache, but operate at 3.66GHz, much higher than today’s 3.0GHz. In server environments clock-speed does not necessarily mean performance crown, as server software is seriously dependant on cache size and from that perspective Intel’s Xeon MP 3.0GHz with 4MB L3 cache may be a better choice for certain types of server deployments. Still, the processors code-named Cranford are to be made using 90nm process technology, which may allow Intel Corp. to set a bit lower prices on such products compared to previously released Intel Xeon MP processors at launch.
Intel Corp. is projected to release its highly-anticipated Intel Xeon multiprocessing unit (MPU) code-named
The platforms and chipsets that will support the new 64-bit Intel Xeon processors MP, previously known as Twin Castle, are architected for dual-core chips and feature several enhancements, including a faster 667MHz system bus, support for PCI Express and PC2-3200 (DDR2 400MHz) memory as well as Demand-Based Switching with Enhanced Intel Speedstep Technology. Intel said
Later this year, Intel said it would deliver thousands of seed systems based on dual-core Intel Xeon processors to end-users and software developers for evaluation.
“Intel is also providing a complete set of software development tools and industry-enabling programs to better help developers and end-users take advantage of the increased performance and throughput that dual core and subsequent multi-core products will offer,” the firm said in its statement.