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It is not possible to have it in PCI-Express.
To use it as coprocessor. History to add 200 Gigaflops
@+
*_*
To use it as coprocessor. History to add 200 Gigaflops
@+
*_*
[Posted by: Xenon | Date: 09/26/05 04:20:29 AM]
Toshiba, one of the developers of the Cell processor, is planning to showcase a reference design kit that will enable designers of consumer electronics to start developing of their Cell-based applications. Besides the central processing unit itself, the reference design kit features core-logic as well as consumer electronics-related peripherals.
The Cell reference set from Toshiba consists of a mainboard with installed Cell processor as well as Super Companion Chip, which has integrated logic to provide video/audio input/output, digital AV interface, IEEE 1394 (FireWire), digital tuner interface, network interface, storage device interface and so on. In addition, the mainboard features ten XDR DRAM chips as well as other appropriate logic, peripherals and connectors.
Toshiba also provides software, which includes operating systems (such as Linux), middleware and software development tools along with its reference set.
Toshiba Cell reference design kit. Picture by PC Watch web-site
Toshiba promises that it would be able to supply the Cell processor along with Super Companion Chip after April, 2006. The first demonstration is scheduled for Ceatec Japan 2005 exhibition on the 4th of October. Other details are unknown.
Earlier this year Toshiba showcased its own TV-set based on the Cell processors and capable of processing up to 48 high-definition video streams at the same time.
The prototype Cell microprocessor produced using 90nm process technology incorporates one dual-threaded PowerPC core and eight so-called synergistic processing units (SPEs) intended for floating-point calculations, the most demanding tasks in entertainment, workstation and server systems. The PowerPC core is projected to have 32KB L1 cache and 512KB L2 cache, while each of the SPEs will have 256KB of cache.
The processor code-named Cell has built-in Rambus XDR memory interface, capable of data rates of 3.20GHz to 8.0GHz. The chip also uses FlexIO processor buses, formerly codenamed Redwood that are capable of running up to 6.40GHz data rates providing bandwidth more than four times faster than best-of-class processor buses available today. Sony and IBM claim their Cell processor will be able to run at speeds exceeding 4.0GHz, even at 90nm process technology, while Intel Corp. is expected to push its dual-core central processing units to 3.20GHz this year.
The Cell processor has peak performance in excess of 200GFLOPS - which equates to 200 billion floating-point operations per second – as measured during initial hardware testing.
