Intel Corp. disclosed certain specifications of its code-named Merom processors, which is slated to come in the second half of 2006 and utilize fully new architecture. An important point is that Merom will be compatible with mobile platforms designed for Intel Pentium M processor based on the Yonah core.
The code-named Merom processor will feature 14-stages pipeline, down from 31 or more stages found in current Intel Pentium (Prescott) designs, 4-issue out-of-order execution engine as well as improved performance of the floating-point unit (FPU). This greatly showcases the substantial difference from the current NetBurst chips that have very deep pipeline and cannot boast with really high-performance FPUs. Furthermore, 14-stages pipeline is deeper compared to AMD Athlon 64’s 12-stages pipeline, which, on the one hand, allows slightly higher clock-speeds compared to the AMD64 architecture, but, on the other hand, may mean a bit lower efficiency.
“With our products, which are developed under the code names Conroe, Woodcrest and Merom [we will say goodbye to NetBurst],” said Patrick Gelsinger, senior cice president and general manager, digital enterprise group at Intel Corp in an interview earlier this year.
Additionally, a being dual-core processor made on a single piece of silicon, Merom will sport L1-to-L1 cache transfer as well as, possibly, unified L2 cache (up to 4MB) for better performance in applications that heavily rely on threading.
In an interview with DigiTimes web-site Intel’s Vice president of mobility group and general manager of the mobile platforms group Shmuel Eden said that the world’s largest chipmaker intends to launch Merom as pin-to-pin compatible with Yonah, which may mean that systems originally designed for Yonah may be upgraded to support the future chips by installing a new BIOS. Provided that code-named Napa platform intended for Yonah also supports Merom, the latter should operate using 667MHz Quad Pumped Bus. Besides, Merom is expected to have a bit more advanced techniques to preserve power.
“The Pentium 4 has a very deep pipeline. That was among other things necessary for the high clock-speeds, however, it caused lower efficiency in terms of high power consumption and performance. We decided for a number of reasons to employ an architecture less deep pipeline. In this regard that resembles rather the Pentium III. But some of the functions we introduced with the NetBurst, will also be found in the new architecture,” Mr. Gelsinger added referring to technologies like Hyper-Threading and Virtualization. In addition, the future chips will have to support the whole breed of desktop features, including virtualization capabilities, LaGrande technology, 64-bit capability in addition to EDB, EIST and iAMT2.
Comments currently: 16
Discussion started: 10/20/05 04:26:20 AM
Latest comment: 08/25/06 01:43:05 PM
1 Be careful of the word "should". Pin compatible still doesn't mean "you can upgrade your laptop to Merom when we ship it". It's close. But be careful.
2 He did not indicate that such a Merom user would gain 64 bit ability.
3 At the time of Yonah's shipping (Jan-Feb) you'd think Intel would at least be able to test a given notebook design from major mfg's and verify Merom will work in the design. That would offer a firmer guarantee.
These comments are testing the waters. Given that A64 "may" (they have a history of being late...) ship a new socket and new dual core mobile chips around this same Jan-Feb timeframe, Intel needs to have something to do battle. You can bet the 64 bit card is going to come up a lot in the verbal battle. Now making a mobile solution upgradeable to Merom would be a pretty big win, imo (braces for flames), but I have doubts on that side given the way those comments were made.
I guess we'll have to see. I can say it'll be nice to see both sides competing in 2006.
10/20/05 04:26:20 AM]
Seems to me you are being a bit harsh. How many people open up their notebooks and change processors? I have never seen anyone doing it, and it has to represent a very minor percentage of people.
Keep in mind, this is the next desktop chip. It is replacing the Pentium 4 too. With that in mind, if it is not compatible with its predecessors, that is not at all unusual. Does the Athlon 64 use the same socket as the Athlon? No. Why hold it against Intel if their next generation does not?
This is a processor I am looking forward to. I consider the Athlon, Athlon 64 and Pentium 4 all junk and I although I have bought Athlons, I have essentially junked them. I still will not use anything but a Pentium III (mainly Tualatins) and I am glad Intel is going back to an upgraded version of it. The Pentium 4 was a horrible failure. I am really excited about the new Pentium III, it is a product I thought would never be made.
Considering the Pentium III was more than competitive with the Athlon, and this with a crippled FSB, this processor should own the Athlon 64, which is a pretty minimal improvement over the Athlon. Also, considering how well the current Pentium M does against the Athlon 64, it would be difficult to see AMD holding onto the performance lead. Still, they might, Intel has come out with really shockingly bad products before (Pentium 4, i820 chipset, etc...). I certainly hope not though, this looks like a promising technology.
What catches my eye is the 4 ALU pipes, if that is what they are saying with 4 issue execution engine. This would be the most an x86 processor has had so far, so Intel would have had to find a way of feeding it. If they have, it should easily outperform the Athlon 64. But, it is not entirely clear that is what it means. My instinct tells me it is probably just three, it is difficult to imagine feeding all four at once, but maybe they have an effective way.
With regards to 64-Bit, I think it is a VERY safe assumption they will have it, since it is replacing the Pentium 4. If it were only replacing the Pentium M, I agree it would be much less certain.
I agree completely on pin compatible. Look at the Tualatin and Coppermine. Same socket, but you couldn't use a Tualatin in a Coppermine motherboard.
One thing that I find a little annoying with these articles is the lack of understanding about pipelining. Most of the authors say a longer pipeline should make for higher clock speeds and lower IPC. This is a terrible generalization, and is often incorrect. If the pipeline takes more stages to do the same functions, yes, it will generally be true. But, this is not always the case. The perfect example is the Athlon 64. Everyone kept saying how they were surprised it did not clock higher. Well, it was because the stages added were to improve IPC, and were not extending the number of stages for existing functions. So, the net result was no improvement in clock speed, and higher IPC from more pipeline stages. You can't generalize without having more information.
10/20/05 07:02:19 AM]
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