Intel Corp. said on Monday that in addition to delay of the anticipated dual-core Itanium processor known as Montecito it would scrap plans to release its quad-core Intel Xeon MP chip code-named Whitefield and would release a faster processor named Tigerton in the same timeframe. The fundamental difference between Whitefield and Tigerton is that the latter supports a new, more efficient, bus to connect processors to the rest of the systems. Other enhancements are also possible.

Tigerton – Faster Than Whitefield, Says

“We have the opportunity to deliver better performance in 2007. Therefore, we are canceling a product and replacing it with something else,” said Intel spokeswoman Erica Fields.

Intel code-named Whitefield and Dunnington chips along with Redland platform were supposed to arrive in 2007, according to a roadmap Intel demonstrated publicly back at Intel Developer Forum Fall 2005. The company currently replaces the Whitefield chip along with the Redland platform with Tigerton processor and the Caneland platform, it emerges.

Intel Whitefield, Dunnington and Tigerton chips designed for multi-processor servers are projected to share a new micro-architecture from Intel Corp., which was confirmed earlier in 2005.  

Intel Implements Dedicated High-Speed Interconnect

The fundamental difference between the Caneland platform and the Redland platform is that the former supports so-called dedicated high-speed interconnect. The bottom line, according to what Intel claims, is that Whitefield chips were supposed to share a processor system bus in multiprocessor system, whereas Tigerton processors are expected to get dedicated interconnection to the rest of the system. Since Intel does not provide any particular details now, the final design may differ from estimations.

Earlier it was anticipated that in “the middle of the decade”, or the year 2007, as some implied, the world’s largest chipmaker unifies its Intel Xeon and Intel Itanium platform so that Xeon system builders could adopt Itanium chips without switching to different hardware. In Summer this year an Intel partner said that in 2007 Intel server platforms would use common serial interconnect (CSI) bus instead of traditional processor system bus and some processors will have built-in memory controller. The first of such chips was projected to be Tukwila, a multi-core Intel Itanium processor, which is, after the Montecito delay, scheduled for 2008. 

It is currently unknown whether the “dedicated high-speed interconnect” of the Caneland has anything to do with the common serial interconnect or is a more advanced version of the [dual] independent bus used in the Truland platforms (E8500 chipsets) available today and will be used with Bensley platforms (Blackford and Greencreek chipsets). It is also unclear whether Tigerton sports built-in memory controller, a feature that boosts performance dramatically.

Redland platform, according to Intel’s roadmaps, was not supposed to support Itanium processors. Currently it is unknown when a common platform for both Xeon and Itanium chips emerges.