The long-awaited launch of the new reincarnation of AMD Athlon 64 X2 and Athlon 64 FX processors for the Socket AM2 that will allow using DDR2 SDRAM is scheduled to take place at Computex 2006 that will be open in Taipei, Taiwan, in June. Note that the first mainboards for Socket AM2 designed by AMD’s partners will be demonstrated already at the European CeBIT show in March 2006.
AMD is expected to launch two dual-core CPUs for Socket AM2 on June 6, 2006: Athlon 64 X2 5000+ and Athlon 64 FX-62. Both processors will be based on F core revision working at 2.6GHz and 2.8GHz respectively. This way, the new AMD core will not only acquire DDR2 memory support, but also will increase the frequency potential of the dual-core AMD processors without switching to new production technology. Just as the previous E core revision, the upcoming F core revision will still be manufactured with 90nm SOI process.
Despite the massive rebranding of the competitor’s processors, AMD will continue using "Athlon 64 FX" and "Athlon 64 X2" trademarks for its CPUs.
Here I would like to note that most of the solutions for Socket AM2 will start sampling in the end of this month already. AMD’s server partners will get their hands on the first Opteron samples for Socket F starting with April 30th , and the retail models will be available for pre-ordering on April 15th . Looks like the first shipments of new Opteron processors will go solely to the server makers.
Moreover, the sources report some technical insider details on the new F core revision, which is also known as Windsor (dual-core) and Orleans (single-core). Here are some pictures of the dual-core F stepping die:
Note that the new die is of bigger size and features higher transistor count: the die size increased from 194 sq.mm to 220 sq.mm , while the transistor count grew from 233mln to 243mln (for the dual-core processors). Single-core CPUs have also grown bigger: the die size increased from 106 sq.mm to 126 sq.mm and the number of transistors – from 120mln to 129mln. Here we are talking about the Athlon 64 or Opteron with 1MB L2 cache.
It is important to point out that the L2 cache size has become slightly smaller: it used to be 82.8 sq.mm and now it is only 77.4 sq.mm . Since the cache memory capacity remained the same, I dare assume that AMD will be using more compact SRAM memory cells in the new processors, which will automatically result into higher density of the L2 cache. Now L2 cache takes 39% of the die, and in the new F revision it will only occupy 30%.
The photo shows clearly that the two halves of the L2 cache are moved slightly away from one another so that there is a small gap between them. It is supposedly some kind of interface that serves for data exchange between the cores, so that the data could be transferred faster from the cache of one core to the cache of another one. And keeping in mind that DDR2 memory is known for higher latencies, this is a very timely innovation. By the way, the memory controller has also grown bigger by about 8%.
The F core stepping processors are expected to be able to control the core frequency within the Cool’n’Quiet technology implementation. At least, it will be possible to almost completely disable the second core in idle or standby mode.
One of the most interesting things about the new processors is their heat dissipation. Dual-core CPUs with F core stepping and up to 2.6GHz frequency and 2x1MB L2 cache will boast maximum 89W TDP. The today’s processors with similar technical specifications demonstrate 110W TDP at 2.2-2.4GHz core clock rate. Although one of the recent Athlon 64 4400+ modifications with 2.2GHz clock speed boasts 89W TDP.
AMD managed to reduce the power consumption by optimizing the transistor leakage current. The priority task here was to reduce the power consumption, and not to grow the clock speeds. As a result, they managed to "adjust" the 90nm process in such a way that they could really save some power at the same working frequencies. However, the dual-core Athlon 64 FX-62 (2.8GHz) processor will feature 125W TDP, which is higher than any of the today’s AMD CPUs have.
The Vcore of the new F core stepping can be selected individually for each processor line-up. If you need to reach higher working frequencies, you can set Vcore to 1.35V. If you can limit the speed to 2.6GHz, 1.21V on the core would be more than enough. This way they will be able to design Opteron models with lower power consumption that will at the same time work at pretty high speeds.
F core stepping processors will support Pacifica visualization technology and Presidio data protection technology, which will require new chipsets and BIOS updates for the mainboards. Only the budget Sempron processors will have no Pacifica support. HyperTransport bus frequency for Athlon 64 FX, Athlon 64 X2, Athlon 64 and Opteron processors will remain equal to 1GHz, and Sempron CPUs will support 800MHz bus.
Comments currently:
19
Discussion started: 02/15/06 09:11:27 PM
Latest comment: 08/16/07 09:57:40 AM
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1.
Nice to see a lot more going into the socket AM2 based chips than the DDR2 Memory controller.
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Posted by: mamisano

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Date: 02/15/06 09:11:27 PM]
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yup, the revision F sure seems to bring a lot of improvements.
lowered Vcore and TDP, denser L2 cache, increased frequency potential, and ofcourse DDR2-800.
the Die size however is significantly increased, maybe for DDR2 controller and the Virtualisation tech.
lookin good AMD
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Posted by: psycho_mccrazy

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Date: 02/15/06 09:43:41 PM]
2.
The smaller L2 cache size could have something to do with less redundancy. Considering how long AMD has been languishing on 90 nm, they could feel comfortable reducing the redundancy of the cache and thereby make it smaller. After the problems with the original K6-III and the insufficient redundancy, they might be wary of this approach, so I could easily be wrong. I am just offering a possible explanation for it.
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Posted by: TA152H

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Date: 02/15/06 10:01:51 PM]
3.
Launched on the sixth day of the sixth month in the year ought six.
The end days are upon us. AMD bears the dark child!
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Posted by: tantryl

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Date: 02/15/06 11:47:11 PM]
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Do you remember the price for the first Apple ? It was $666, which makes you wonder what Steve Jobs was thinking. Of course, volume back then was extremely low.
How I wish I were old enough to have that kind of money back then. I suspect a new one these days would be worth over $100,000 if it existed; the used ones sell for over $50,000. I do have a sealed Apple IIe though :P.
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Posted by: TA152H

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Date: 02/16/06 03:04:46 PM]
4.
Why the die size got so big 220 sq.mm from 194, if the transistor count got on only 11mln bigger (233mln to 243mln)?
Not only that but also the SRAM is taking 9% less space on the die.
Doesn’t it sound strange?
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Posted by: lazy

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Date: 02/16/06 08:46:51 AM]
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maybe the lower-power logic transistors occupy more space unlike the new cache transistors ...
Also you have to take into account the memcontroller(which got bigger) uses bigger transistors than other parts of the chip ...
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Posted by: mino

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Date: 02/16/06 09:06:14 AM]
Lazy,
It sort of makes sense, actually. Memory is the most efficient transistor in terms of transistors per area, so as it takes a smaller percentage of the whole, you would expect the physical size to increase at a higher rate then the number of transistors in the processor. If you get a chance, look at the percentage of transistors that are the caches, and then look at the portions of the processor make up the cache. You'll notice the percentage of transistors is greatly higher than the percentage of the area they take up.
I am with you in thinking that the size increase is kind of strange though, particularly considering the L2 cache got smaller in area. I don't believe this is all related to the memory controller, as I don't believe AMD was stupid enough to include support for DDR as well as DDR2. Of course, there could be things inherent to DDR2 that require more logic to support, but I don't know anything about this. It just seems strange for the size to increase so much, particularly when you consider how much companies hate this because it makes their processors more expensive to make.
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Posted by: TA152H

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Date: 02/16/06 11:12:04 AM]
5.
Looks like no HyperTransport bus increase as was expected?
Increasing the bus would add little to no performance gains, seeing as you can run with a full 1200mhz (600mhz) HyperTransport on todays CPUs and still get no performance loss, I guess it didn't make sense to increase it over 2ghz for no performance gains anyways.
Also now that its going to be using DDR2-800 instea of the DDR2-667mhz, they can keep with the 200mhz clock generator.
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Posted by: Cow187

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Date: 02/16/06 10:54:16 AM]
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Intel is already at DDR2 800Mhz with their last chipset, so it makes sense to support it, or the platform would look inferior.
I'm very interested in seeing the difference in performance differences with DDR2 533, 667 and 800.
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Posted by: Kaz

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Date: 02/17/06 03:16:50 AM]
You can't be serious Kaz.
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Posted by: Po

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Date: 02/18/06 03:27:11 AM]
?!?!?!
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Posted by: Kaz

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Date: 02/20/06 02:49:59 AM]
6.
http://www.sis.com/pressroom/pressrelease_000212.htm
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Posted by: zest

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Date: 02/17/06 03:41:04 PM]
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They would never release the processor at just DDR2 667, because Intel is already at DDR2 800 with their latest chipset.
AMD by supporting up to DDR2 667Mhz memory would make their platform look inferior.
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Posted by: Kaz

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Date: 02/20/06 02:57:01 AM]
7.
A release date of 06/06/06 ?
Interesting...
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Posted by: Tom

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Date: 02/17/06 04:03:01 PM]
8.
SEX
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Posted by: AMD MASTER

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Date: 08/01/06 12:49:06 AM]
9.
u suck horse
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Posted by: AMD MASTER

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Date: 08/01/06 12:49:21 AM]
10.
whoa i can't believe that worked
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Posted by: AMD MASTER

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Date: 08/01/06 12:50:11 AM]
11.
AMD Athlon X2 based Laptops are high heat generators. They cant be kept on Lap.
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Posted by: Prof. Zulkharnain

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Date: 08/16/07 09:57:40 AM]
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