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The new chief of manufacturing at Advanced Micro Devices said the company has already made first test chips using 45nm process technology, however, he said the new fabrication process still does not employ high-k dielectrics and similar innovations that IBM and AMD developed collaboratively. The new technologies, however, may still be a focus for AMD, the new production chief joined AMD from IBM.

Douglas Grose, who has been appointed to the role of senior vice president of technology development, manufacturing and supply chain at AMD, said that AMD’s Dresden, Germany manufacturing facility has been producing test chips using 45nm for some time now and the company has a very strong focus on rapid development of the new fabrication technology.

Mr. Grose indicated that the 65nm process technology – which went commercial in early December, 2006 – is already fully developed and ready to ramp up. The main target for AMD today is 45nm fabrication process.

“65nm is kind of old hat. The focus is on 45nm. […]We’ll be producing early [45nm] products probably in Q2 of 2008, with full production in the second half,” Mr. Grose is reported to have said in an interview with Reuters.

It is still under review what kind of 45nm process technology AMD will use along with its chips. On the one hand, AMD might develop a version of its silicon-on-insulator (SOI) fabrication process to ramp up 45nm chips quickly. On the other hand, AMD and IBM already announced that they “expected” to make commercial products using technology that features immersion lithography and ultra-low-K interconnect dielectrics in 2008. In addition, AMD and IBM developed 45nm process technology with high-K dielectrics.

“It really is going to depend on what makes most sense and on our product roadmap. It could be late in the 45nm timeframe or the 32nm node application,” Mr. Grose said.

Discussion

Comments currently: 4
Discussion started: 02/06/07 03:16:04 PM
Latest comment: 03/03/07 11:10:51 PM
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1. 
You mean like Intel did a whole 10 days before hand? http://www.intel.com/pressroom/archive/releases/20060125co mp.htm
[Posted by: Tuoni  | Date: 02/06/07 03:16:04 PM]
+ expand thread (1 answer)

2. 
“It really is going to depend on what makes most sense and on our product roadmap. It could be late in the 45nm timeframe or the 32nm node application,”

translating

"We will build 45nm, and lower, chips when we will be able to"?

it's not like we don't need energy efficient chips nowadays.
[Posted by: tof  | Date: 02/07/07 01:40:20 AM]
+ expand thread (1 answer)

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