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Advanced Micro Devices said that it may support DDR2 PC2-8500 memory standard with its forthcoming quad-core microprocessors for high-performance desktops later this year. The claim means that the company will support DDR2 memory for quite some time from now on with its quad-core chips.

“In the design of our upcoming native quad-core client processors, which we expect will be available in the second half of 2007, AMD is planning for DDR2-1066 memory support in our integrated memory controller with the expectation that it will be compatible with any future JEDEC standard that may be adopted,” said Bob Brewer, corporate vice president and general manager of AMD’s desktop division.

AMD’s quad-core microprocessors for desktops are expected to emerge after the company releases its quad-core server chips. The new central processing units, which feature monolithic, or “native” design, will be built using AMD’s 65nm Silicon-on-Insulator (SOI) fabrication process. The forthcoming microprocessors will include a broad range of functionality and micro-architectural improvements, including a new ability to dynamically alter the frequency of each core on the chip to match application workloads and thereby reduce overall power consumption, large level-three cache and so on.

“Dependent upon validated platforms and JEDEC support, AMD hopes Micron’s innovative DDR2 1066MHz memory modules will provide an exemplary DRAM technology that can extend existing system designs and offer next-generation memory performance at a competitive price point,” Mr. Brewer added, commenting Micron’s release of PC2-8500 memory chips.

It was rumoured many months ago that AMD was going to support DDR3 in 2007 with its AM2+/AM3 platforms. However, AMD pushed AM3 processor form-factor into 2008, just like DDR3. As a result, the company needed something, which would be on par with Intel’s 3-series chipsets that support PC3-8500 (DDR3 1066MHz), but would not compromise stability or compatibility with standards. The new DDR2 speed-bin is a good candidate to provide sufficient bandwidth for AMD’s quad-core chips.

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