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Intel’s code-named Nehalem processors have been discussed for nearly five years now, but Intel was tight-lipped enough in order not to disclose details of the new micro-architecture itself as well as implementation peculiarities. Nevertheless, recently Intel started to inform its partners about the future platforms, which means that at least some peculiarities of the new chips have come to light.

It is known that Nehalem as well as Westmere central processing units (CPUs) will use a new platform architecture and while the company does not directly state it, the new platform will hardly use processor system busses, but rather will feature point-to-point serial bus (which is currently referred to as Common Serial Bus or CSI) similar to Hyper-Transport or PCI Express. The new CPUs due in late 2008 will feature so-called dynamically scalable architecture, which means that Intel will be able to tailor its processor designs according to needs of various market segments.

In particular, Intel already announced that, among other things, it would be able to scale and configure caches, interconnect controllers as well as memory controllers. Already now Intel can reduce or increase cache sizes for various processors without many problems, whereas Advanced Micro Devices can enable or disable Hyper-Transport links within its processors depending on their positioning (e.g. AMD Opteron processors for multi-processor servers have three HT links, whereas Athlon 64 for 1P machines have only one HT link). But Intel wants to go even further and scale the number of memory controller channels. According to PC Watch web-site, the top Nehalem processor code-named Bloomfield with four cores will have triple-channel DDR3 memory controller, whereas slightly less advanced may have less channels.

Three memory channels supporting PC3-12800 (DDR3 1600MHz) memory would provide approximately 38.4GB/s memory bandwidth, up significantly from about 21.3GB/s memory bandwidth available today. Given that in 2009 Intel plans to release Nehalem processor with built-in graphics core, triple-channel memory controller may help to keep performance in 3D games on relatively high level.

Intel did not comment on the news-story.

Discussion

Comments currently: 2
Discussion started: 06/11/07 12:57:32 PM
Latest comment: 06/11/07 01:38:06 PM

[1-2]

1. 
3rd channel solely dedicated to the integrated graphic core 0.0
This is going to be a monster for those that have large monitors and currently need to buy a videocard to feed them.
[Posted by: 1234  | Date: 06/11/07 12:57:32 PM]

2. 
Sounds intresting.

I wonder if it's possible for that built in graphics unit can act as a SIMD processor for SSE if you want to use an external graphics card.
Or maybe it can assist the external one by crunching some shaders to leave more item for vertex processing.
...or maybe both?

I can't wait! I want to build a new system! My E6600 and 7950GT feels old already.
Nehalem makes a new socket legit... all this new stuff must use a new socket. I wish a revised Nehalem on steroids was availible already! :D
*makes a wish*
[Posted by: Who else?  | Date: 06/11/07 01:38:06 PM]

[1-2]

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