Intel Corp. is about to reveal more details about the family of microprocessors made using 45nm high-k process technology based on the Nehalem micro-architecture at the upcoming IEEE International Solid-State Circuits Conference (ISSCC) that will be held in San Francisco, California, from the 8th to the 12th of February, 2009.
Apparently, Intel processors based on Nehalem architecture may be configured in such a way that they consume less than 10W of power, thanks to module nature of Nehalem. Intel plans to reveal more details regarding different versions of its new microprocessors during a session at ISSCC.
“A family of next-generation IA processors with up to 8 cores, enhanced Core micro-architecture, 3-level caches and 2-way SMT is implemented in 45nm high-k metal-gate CMOS. The family has a coherent point-to-point link and integrates memory controller, power-management microcontroller and power-gate transistors and scales from sub-10 to 130W in mobile, desktop and server applications,” the official description of the session reads.
The most energy efficient chip based on Intel Nehalem micro-architecture that is known to the public at the moment is not-yet-announced Intel Xeon L5520 that has four cores with simultaneous multi-threading technology enabled, 8MB of cache as well as 2.26GHz clock-speed amid thermal design power of just 60W.
It remains to be seen when sub-10W Nehalem-class processors emerge, what specifications the chips will have and what level of performance they will offer.