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Advanced Micro Devices on Wednesday demonstrated the first die shot of its code-named Llano microprocessor that features both general-purpose x86 cores as well as graphics processing engine. The picture reveals some of the basic specifications of the chip. More importantly, AMD said that the Llano chip is due in 2011, no changes in the roadmap.

Based on the die shot displayed by Rick Bergman, senior vice president and general manager of AMD’s products group, the first Fusion processor from AMD will feature 4 x86 cores that resemble those of Propus processor (AMD Athlon II X4) as well as 6 SIMD engines (with 80 stream processors per engine) that resemble those of Evergreen graphics chip (ATI Radeon HD 5800), PC3-12800 (DDR3 1600MHz) memory controller, possibly, with some tweaks to better serve x86 and graphics engines.

The processor lacks unified L3 in order to reduce manufacturing cost, but will have 2MB of L2 cache (512KB per core), which contradicts to previously available information that the chip has 4MB of L3.

AMD’s Llano will feature around 1 billion of transistors, which is logical since AMD’s Propus processor has around 300 million of transistors, whereas 480 stream processors and additional special purpose logic includes around 600 million of transistors. The chip will be made using 32nm silicon-on-insulator fabrication process.

AMD Llano accelerated processing unit (APU) is a part of AMD’s Sabine platform that features AMD 900-series core-logic, USB 3.0, Serial ATA-600 and so on.

Tags: AMD, ATI, Llano, Sabine, Fusion, Evergreen, Phenom, Athlon, Propus

Discussion

Comments currently: 7
Discussion started: 11/11/09 09:34:35 PM
Latest comment: 01/18/11 01:12:43 AM
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1. 
Impressive. That's enough processing and GPU power to play most games at decent settings. Don't know if that'd be the case in 2011, but it's certainly not a lowest end part.
0 0 [Posted by: ET3D  | Date: 11/11/09 09:34:35 PM]
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2. 
5800 = 5000
Llano sounds like a Athlon II with an on die Radeon HD 5600 series <3

Intel be afraid, very afraid
0 0 [Posted by: wiak  | Date: 11/12/09 12:02:22 AM]
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3. 
If you look carefully to the cache cells and compare them to the current Regor caches, then you could see that these are 1 MB L2 caches not 512kB. Thus it would be 4MB L2 totally, which would be in-line with the previous L3 number ;-)

Coincidence ?
0 0 [Posted by: Bingle  | Date: 11/12/09 03:17:20 AM]
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4. 
Looks like AMD is still a leader in CPU (and GPU) innovations.
0 0 [Posted by: zaratustra06  | Date: 11/12/09 12:42:55 PM]
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- collapse thread

 
AMD a leader?!? On paper!!!

This chip currently is only for good show! It's still a concept. They don't even have a working prototype!
0 0 [Posted by: dudde  | Date: 11/12/09 02:34:14 PM]
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5. 
I do question the AMD making this x86, because I think most operating systems are moving towards X64. Interesting nonetheless
0 0 [Posted by: bre  | Date: 11/15/09 10:43:27 AM]
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6. 
it would appear that a whole year from now in 2011 this chip will not even out perform the quad Core 8600, never mind the newer existing I series of intel chips at generic x264 HD Encoding and thats a shame.

its also not gone unnoticed that Bridgman the AMD executive in charge of Linux documentation etc, promised for a UVD ASIC HW video decoder documentation code review 366 days ago on the 7th of january 2009, is still unrealised to date.

so yet another years gone by and still no chance of existing ati UVD capable users/ 3rd party coders ever using writing code to acually use that existing HW UVD decoder ASIC for assisting their Encode/Decoding inside Linux or 3rd party windows apps....

can we beleave anything these people say anymore. PR innovation comes before real innovation and their 'trusted word' to actually do what they say they will it seems, and thats the real shame.
0 0 [Posted by: sanity  | Date: 01/07/10 10:37:26 PM]
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