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Intel Corp. plans to release its next-generation microprocessors based on the code-named Sandy Bridge micro-architecture in Q1 2011, sources familiar with Intel Corp.’s plans told X-bit labs. The initial processors based on the new micro-architecture will not aim at the high-end market, but will still not be compatible with current mainstream infrastructure and will require new sockets and chipsets.

The first Intel Sandy Bridge chips will feature two or four cores with Turbo Boost and Hyper-Threading technology as well as integrated graphics processor that will actually be on the same die as the x86 cores, according to previous reports. The chips will address mainstream market segments currently served by Intel Core i7, Core i5 and Core i3 processors, hence, there will be a lot of different models with 65W (dual-core, quad-core)or 95W (quad-core) thermal design power. The new processors will use LGA1155 form-factor and will be compatible with platforms based on the Intel 6-series chipsets code-named Cougar Point. It is noteworthy that while the new 6-series mainstream chipsets support Serial ATA-600 and some other innovations, the USB 3.0 does not seem to be a capability of the core-logic.

Some reports claim that six-core and eight-core Sandy Bridge-based designs will become available in Q2 2011 or later, hence, Intel is taking the same strategy as with Westmere micro-architecture and plans to initiate production of less complex processors first with higher-end models following later.

The key feature of Sandy Bridge Intel AVX (Advanced Vector Extensions) which, when used by software programmers, will increase performance in floating point, media, and processor intensive software, according to the Intel. Key features of Intel AVX include wider vectors, increasing from 128 bit to 256 bit wide, resulting in up to 2x peak FLOPs output. Enhanced data rearrangement, resulting in allowing data to be pulled more efficiently, and three operand, non-destructive syntax for a range of benefits. Intel AVX can also increase energy efficiency beyond the increases brought by the micro-architectural innovations, and is backwards compatible to existing Intel processors.

Intel did not comment on the news-story.

Tags: Intel, 32nm, Cougar Point

Discussion

Comments currently: 7
Discussion started: 02/10/10 08:43:08 PM
Latest comment: 02/13/10 03:07:10 AM
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1. 
Hmm, can Intel license AVX to AMD or is it a locked technology only for Intel products?
0 0 [Posted by: RtFusion  | Date: 02/10/10 08:43:08 PM]
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- collapse thread

 
AMD can use it too. It has been rumored that the bulldozer AMD CPU-s have AVX. These should be coming out next year.
0 0 [Posted by: uibo  | Date: 02/11/10 05:34:17 AM]
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It is not an rumor it is official, that AMD will support AVX, and they will even support FMA4 (fused multiply adds), aka 3operand calculations, which has be used so far only in RISC systems. If used, this will result in a reasonable FP boost.

Official statement with additional links:
http://blogs.amd.com/nigeldessau/tag/avx/
0 0 [Posted by: Bingle  | Date: 02/13/10 03:05:12 AM]
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2. 
I'm bummed Intel chooses to ditch socket 1156 after such a short period, I was planning an i3 build.
On the other hand Intel seems to improve CPU's float performance, while AMD seems to improve integer performance with Bulldozer relying on GPUs to help with float tasks. Let's see who bet the right horse.
0 0 [Posted by: dragosmp  | Date: 02/11/10 07:29:46 AM]
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- collapse thread

 
That is a wrong assumption, FP calculations will get a boost, too, see me posting in the AVX thread above.

Currently rumors anticipate that AMD's next gen architecture will have four 64b pipelines, which can be combined into 2x128b or 1x256b.
0 0 [Posted by: Bingle  | Date: 02/13/10 03:07:10 AM]
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3. 
D'oh! Just done a core i3 build. I wonder what else might be released on the socket 1156 platform. Going to a socket 1155 just appears to be a pointless move. What new feature is incompatible?
0 0 [Posted by: asc99c  | Date: 02/11/10 09:48:00 PM]
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4. 
A new socket already.........seem insane IMHO when you consider how many socket changes AMD release

And I was just planning an i3 build
0 0 [Posted by: alpha0ne  | Date: 02/12/10 10:25:23 PM]
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