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For years Advanced Micro Devices has claimed that its central processing units (CPUs) for servers are more power-efficient compared to rivals from Intel Corp., however, while the latter offered specially-tailored low-power server platforms, AMD only relied onto its energy-efficient chips on standard platforms. But the things are going to change later this year when AMD launches its code-named Adelaide 2-way platform.

AMD Adelaide platform will be based on the code-named Lisbon six-core energy-efficient CPUs as well as AMD SR5650 core-logic (22 PCIe lanes, 9.6W TDP in low-power HT1 mode) with AMD SP5100 input/output controller. AMD Opteron 4160 EE and 4158 EE chips will be clocked at tremendously low clock-speeds – 1.60GHz and 1.50GHz – however, this makes us hope that the microprocessors will also consume dramatically low amount of power – up to 35W. At present AMD Opteron EE processors have 60W thermal design power (TDP) and 40W average CPU power (ACP).

But the low power consumption of Adelaide will come at a price: if the next-generation Maranello and San Marino platforms will feature HyperTransport 3 links, then Adelaide will have to rely HyperTransport 1 instead in order to reduce consumption of both CPUs and core-logic sets. Just like the code-named San Marino, AMD Adelaide will support up to six memory modules per socket, however, it will not support fast DDR3 modules, but will work with low-voltage DDR3 at the speeds of up to 1066MHz.

AMD’s energy-efficient six-core Opteron microprocessors will feature 3MB of level-two cache (512KB per core), 6MB of level-three cache, two HyperTransport 1 links and dual-channel DDR3 memory controller that supports up to PC3-8500 (DDR3 1066MHz) memory in addition to low-voltage DDR3 and quad-rank DIMMs. The chips will be compatible with C32 socket (LGA 1207) and will feature C1E, Cool Speed, Precision Thermal Monitor, Remote Power Management Interface, DDPM, AMD CoolCore, Enhanced AMD PowerNow! Technology, AMD Wide Floating Point Accelerator, AMD Memory Optimizer Technology, AMD Balanced Smart Cache, AMD-Vc, EVP, OPMA and other technologies.

AMD did not comment on the news-story.

Tags: AMD, Adelaide, Opteron, Lisbon, 45nm, Maranello, San Marino, C32

Discussion

Comments currently: 7
Discussion started: 02/25/10 10:21:02 AM
Latest comment: 03/03/10 10:02:18 AM
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1. 
Yesterdays article was about AMD not cutting features for power saving cpu's. Yet this platform uses hyper transport 1 and the cpu's are clocked to nothing. So possibly the 2 most important features, bus speed and clock speed are cut.
0 0 [Posted by: cashkennedy  | Date: 02/25/10 10:21:02 AM]
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The article you refer two was about 8-core/12-core Magny-Cours chips.
0 0 [Posted by:  | Date: 02/26/10 08:28:06 AM]
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2. 
clockspeed and bus speed aren't features.
features are: NX-bit, SSE1 through 4, MMX, Virtualization, etc.

however, reducing clockspeed and bus speed so dramatically will harm performance to the point where those chips hold little interest to me.
0 0 [Posted by: taltamir  | Date: 02/25/10 12:50:39 PM]
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The bus speed and processor speed has a small piece how a server performs. It is mainly the file IO that servers have to worry about. Using these processors and SSD will make the total server respond faster than using high performance processors and regular mechanical drives. Though the Adelaide will probably be better in a one way setup compared to a two way setup, but the fast enough for an energy efficient server.
0 0 [Posted by: electro  | Date: 02/25/10 03:50:57 PM]
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you should compare this CPU to another CPU with the same SSDs, not with SSDs vs HDD. And what you describe is not universal to all servers.
But I can see how some servers designed for some specific purposes could see such a benefit.
0 0 [Posted by: taltamir  | Date: 02/28/10 06:00:55 PM]
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3. 
And they are using HT1 to save power, not to divide the market into cheaper segments.
Sorry, but your comment sounds like trying to bash AMD for no reason at all.
M.
0 0 [Posted by: mschira  | Date: 02/25/10 03:01:37 PM]
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And how much power do they save with HT1 usage when first chipsets like 40PCIe lane 790FX consumed some 14W and were produced in 65nm TSMC. In fact probably what they didnt try to explain is that HT1 will be sufficient enough for Dual Socket platforms so they could claim lowest power consumption from 39-38W to 35W

Probably, for some server room with few hundreds of that platforms wouldnt mean much on electricity bill as how many DDR3 modules would support. Only if 35W would mean that platform with all six memory modules installed would consume 35W would be something more considerable to claim that HT1 is really neded but when you install some even LP modules this server will hardly consume less than 80W and 76W or 80W is not such big deal after all to make so much fuss about.
0 0 [Posted by: OmegaHuman  | Date: 03/03/10 10:02:18 AM]
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