Llano is based on K10 core and is built on 32nm SOI by GloFo.
What's common between them?
Does Meyer's statement mean the first public acceptance that AMD has no enough resourses to run a few project in parallel?
AMD Postpones Launch of Microprocessor with Integrated Graphics[07/16/2010 11:53 PM]
Due to issues with 32nm silicon-on-insulator process technology, Advanced Micro Devices had to delay the launch of the highly-anticipated code-named Llano processor that combines high-performance x86 central processing unit with graphics processing unit on the same die. The company said that the postponement may be two months long.
"Llano - our Fusion APU offering aimed at the higher end of the client market - is generating positive customer response. However, in reaction to Ontario’s market opportunities and a slower than anticipated progress of 32 nm yield curve, we are switching the timing of the Ontario and Llano production ramps. Llano production shipments are still expected to occur in the first half of next year," said Dirk Meyer, chief executive officer of AMD, during a conversation with financial analysts.
Earlier it was expected that AMD will start to ship its Llano accelerated processing units (APUs) for revenue already in Q4 2010 with official product launch taking place sometime very early in 2011. It is not clear whether AMD has problems wedding the Llano design to the 32nm SOI fabrication process, there are issues with the process itself or the design of the Llano has certain flaws. In any case, the start of commercial shipments slipped by two months, according to AMD.
"We have seen the rate of yield leaning below our plans on 32nm. [...] We take a bit more time to work on the 32nm yields up the curve. So, the effective change [...] to our internal plans on Llano amounts to a couple of months," said Mr. Meyer.
As reported earlier, AMD Llano accelerated processing unit (APU) will have four x86 cores based on the current micro-architecture each of which will have 9.69mm² die size (without L2 cache), a little more than 35 million transistors (without L2 cache), 2.5W – 25W power consumption, 0.8V – 1.3V voltage and target clock-speeds at over 3.0GHz clock-speed. The cores will dynamically scale their clock-speeds and voltages within the designated thermal design power in order to boost performance when a program does not require all four processing engines or trim power consumption when there is no demand for resources. According to sources familiar with the matter, different versions of Llano processor will have thermal design power varying from 20W to 59W: high-end dual-core, triple-core and quad-core chips will have TDP between 35W and 59W; mainstream chips with two of four x86 cores will fit into 30W thermal envelope and low-power dual-core Llano chips will have 20W TDP. Llano will be made using 32nm SOI process technology.
AMD Sabine platform will also include code-named Hudson input/output controllers that will support PCI Express graphics port, 16 USB ports, USB 3.0 support (Hudson M3 only), 6 Serial ATA ports with RAID support, 1Gb Ethernet, integrated video DAC, integrated clock-generator and so on. Besides, Sabine may also feature optional Vancouver-series graphics processing units.
AMD's arch-rival Intel Corp. plans to start revenue shipments of its Sandy Bridge processors with built-in next-gen graphics core in Q4 2010.
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