Intel introduced the Hyper-Threading technology with its Xeon DP processors about a year ago. The technology allowed the CPU to perform different threads at the same time utilising the unused parts of the microprocessor. This approach is aimed to make processing more efficient and fast. Now the Santa Clara based semiconductor manufacturer wants to go even further: to deploy even more effective pattern that will enable to perform independent threads speculatively. Intel said they will make the design of processors more modular - this will not only allow to increase the speed of modern computers due to the ability of microprocessor to use different blocks for different tasks, but will also make power management more easy for a CPU.

When a microprocessor contains of a lot of different independent entities, when a unit is not used, it can be turned off, saving power that is consumed by the CPU. Nowadays processors can only scale their clock-speed and voltage, while they are not able to decide which their parts are really needed. In contrast, graphics chips used in notebooks, such as ATI’s Mobility RADEON 7500 and 9000 can turn their parts on and off when they are not needed, for example, the 3D-engine is not needed when running MS Office or something like that. In case of graphics chips, there are both software and hardware means of power-saving methods and GPU utilisation tracking. Intel said they will develop certain hardware-only capabilities that perform the mentioned tasks. On the other hand CPU will be able to effectively use its resources in order to increase the speed of computing. Unfortunately, I can hardly believe that such major additions to the microprocessors will not require the support of the software at all.

In fact, Intel already introduced certain techniques that will be used in the Banias processors in order to lower their power consumption (see this news-story): the upcoming processor for notebooks implements a number of quite interesting methods of utilising the CPU more efficiently. For instance, Advanced Branch Prediction analyses the patterns used by an application in the past and predicts the operations that can be executed by this application in future. When the system is ready to perform a number of operations at the same time, Micro-Op Fusion technology combines those into one in order to utilise the CPU pipeline more efficiently, boosting the speed and lowering the power-consumption. In contrast to most of the systems that continue to power even unused components, Power Optimised Processor Bus lowers power-consumption of the platform by automatically bringing down the voltage and optimising the buffers’ execution. Dedicated Stack Manager technology offers some hardware means that track the loaded system resources and available registers. Effective management leads to greater efficiency of CPU utilisation, gaining the speed and lowering the power-consumption. Although I cannot state that the same technologies will be brought to the desktop processors in future, but everything looks like such technologies along with the future Hyper-Threading incarnations may find their home in desktop CPUs in a number of years.

Please keep in mind that we still do not know if OS support is required for the ability to turn something on and off in the microprocessors. It is known that the Hyper-Threading needs to be supported by the operational system. In case the techniques mentioned above also require the OS to “know” about them, they will not become adopted very widely in the near future in the desktop CPUs, at least, until the next generation Windows will appear sometimes in 2004. Nevertheless, we should note that Intel wants to utilise a rather unique opportunity to increase computer performance without pumping up the gigahertz substantially.