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Intel Discloses Details on Prescott Processor at IDF

by Anton Shilov
02/19/2003 | 08:04 PM

Intel disclosed a lot of additional information about the next-generation Prescott processor today. It is very interesting to point out that although Intel says that the Prescott is based on the NetBurst architecture, they never said that the Prescott will be branded as another Pentium 4 processor. We will still have to find out how Intel will call its CPU that comes on the market in the fourth quarter this year: the first 90nm chip apparently has so many improvements and advantages over the previous Pentium 4 microprocessors that Intel may clearly call it as the Pentium 5 or something like that; as I remember, four years ago the company branded the Pentium II with SSE and higher clocks as the Pentium III processor, so, why not call the Prescott with a different brand-name, especially considering its very special features?

From the technological point of view the Prescott processor seems to be very complex and innovative. It will be produced using 90nm strained silicon manufacturing process which will eventually allow Intel to scale the core-clocks of the CPU up to 5GHz and above (see the latest Intel’s unofficial roadmap here). In addition, Intel’s engineers adopted new clock distribution scheme. The new scheme allows to reduce clock skew across the die and to eliminate RC coupling that caused 20-picosecond skew in the Northwood processors. The Prescott core is said to consist of 100 million of transistors, about the same number as found on the high-end AMD x86-64 chips that are also due to come this year. <%BANNER[article]%>

Very important additions to the CPU core are enlarged L1 and L2 caches. The forthcoming CPUs will feature 16KB of L1 cache and also 1MB of L2 cache. With the Prescott processors the NetBurst core will also get more advanced pre-fetch mechanism that should address the issues with pipeline stalls when the current approach cannot predict program’s branch. This means that the Prescott microprocessors are very likely to work more effectively at the same core-speed with the Northwood brethren, we may even expect slightly slower Prescott chips to work faster than higher clocked Northwood CPUs.

Intel will also implement another version of the Hyper-Threading technology in the Prescott. As is known, Intel has been playing with the feature since early Willamette CPUs in order to enhance its efficiency and boost the gain in performance it brings. Although the Prescott processors will be able to support two simultaneous threads, just like the Northwood’s version, Intel goes on to say that it will work more efficiently.

The highly-anticipated 13 Prescott New Instructions were not discussed in details, but the journalists were told that two new instructions address thread synchronization and one should improve the speed of processing video encoding tasks. Other new instructions support floating-point-to-integer conversions, SIMD floating-point operations and complex arithmetic operations.

It is a bit surprising, but the Prescott processors also support La Grande security technology that was supposed to come only with the second-generation 90nm Tejas CPU . It seems that Intel updated its plans and now we are going to see the feature this year.

As we have already told you, the Prescott processors will utilise 800MHz Quad Pumped Bus and will be compatible with all i865 and i875 series of platforms that are scheduled to appear in the second quarter this year. As a result, when the Prescott chips will come to the market in the Q4 there will be more chances for it to be widely adopted in a short timeframe.

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