by Anton Shilov
04/16/2004 | 03:36 PM
Intel is planning to postpone the release of its Itanium 2 successor with 9MB level-three cache to the year 2005, from the mid-year 2004, sources familiar with the company’s plans revealed. The information may be a sad news for customers interesting in accelerated Itanium, but there is also a good news: the next-generation IA64 chip will get faster 667MHz processor system bus.
According to the updated plans of the chip giant revealed by unofficial sources, the follow-up for the current Itanium 2 processor with Madison core, the chip known under Madison 9M code-name, will emerge only in the first quarter 2005, not the third quarter of 2004, as previously planned. The IA64 microprocessor with up to 9MB of level-three cache is engineered for high-end 64-bit multi-processor applications. The delay seems to have its reason – the new chip will get 667MHz processor system bus, something that was missing from the initial information about the product. The shift to higher-speed bus from today’s 400MHz is likely to require Intel or its chipset platforms developers to make certain changes to core-logic for the
Intel officially outlined the long-term Itanium processor roadmap in mid-February 2004. The company said the
The chip code-named Montecito was expected to be Intel’s first IA64 chip with two cores and 24MB of L3 cache. Processor known under
It is not clear whether the postponement of
667MHz will be a magic number for Intel processors designed for multi-processor servers. The company’s next-generation Xeon MP processors with Enhanced Memory 64 Technology code-named
Nowadays high-end Itanium 2 lineup from Intel includes 1.50GHz, 1.40GHz and 1.30GHz models with 6MB, 4MB and 3MB L3 cache respectively.
Representatives from Intel did not comment on the report.