Intel Readies Processor with Integrated Memory Controller, I/O Functions

Intel Tolapai with Built-In North and South Bridges to Emerge in 2007

by Anton Shilov
02/05/2007 | 04:36 AM

Intel Corp. the world’s largest maker of x86 microprocessors, reportedly plans to introduce a chip for low-cost systems with integrated memory controller and built-in input/output (I/O) functionality. The introduction of such processor may redefine the market of very affordable systems and may pose some threat to companies like Via Technologies.

 

Slides, which are presumably from Intel roadmap, indicate that Intel Tolapai system-on-a-chip (SoC) will include a Pentium M-like microprocessor with 256KB L2 cache, integrated dual-channel DDR2 memory controller that supports PC2-3200 (400MHz), PC2-4200 (533MHz), PC2-5300 (667MHz) and PC2-6400 (800MHz) memory modules, PCI Express controller as well as I/O bridge that features support for Serial ATA, USB, Gigabit Ethernet and so on.

The x86 processing engine on the chip will operate at 600MHz, 1.06GHz or 1.2GHz clock-speeds and its thermal design power varies from 13W to 25W.

The new processor, according to HKEPC web-site, will come in 1088-ball flip-chip ball grid array (FCBGA) form-factor and will be mainly aimed at embedded, small form-factor and low cost systems. For example, it is possible to assemble a very low-cost computer based on the Tolapai processor and accompanied by a graphics adapter, a hard disk drive, an optical drive and a monitor, which may be an interesting option for developing countries.

Currently Advanced Micro Devices and Via Technologies offer their Geode and C7 families of products to emerging markets and another rival targeting the same market segment with its offering will indisputably redefine the market of low-cost PCs. Intel once attempted to enter a highly-integrated platform code-named Timna, but cancelled the plan in the late nineties.

In addition to targeting emerging markets, Tolapai may also be the first highly-integrated chip of its kind with roadmap extending to central processing units with integrated graphics capabilities.

Tolapai client’s reference board is set to be available in Q2 2006 and the final product is projected to ship in late 2007.