Intel Reveals “Larrabee” Teraflop Processor

Intel Set to Release First “Tera-Scale” Chip in 2010

by Anton Shilov
06/27/2007 | 01:43 PM

Intel Corp., the world’s largest maker of microprocessors, has disclosed several details concerning its project code-named Larrabee. Apparently, the latter, despite of certain media reports, has no direct relation to Intel’s graphics processing unit’s development, but is a part of Intel’s Tera-Scale initiative, under which the company develops chips for special-purpose computing.


Intel’s code-named Larrabee processor, which seems to be an array of computational arithmetic logic units (ALUs) with caches as well as memory controller, will be capable of processing “well in excess” of a teraflop of data, according to Justin Rattner, Intel Corp.’s chief technology officer. The processor is set for release in 2010, but could show up in 2009, Mr. Rattner is quoted to have said, InformationWeek web-site reports.

Even though the code-named Larrabee processor can compute 3D graphics, just like any other modern microprocessor via ray-tracing technology, it is not designed for computing traditional Direct3D or OpenGL computer graphics and is not a graphics processing units, such as ATI Radeon or Nvidia GeForce.

The first incarnation of Intel’s Tera-Scale initiative was an 80-core Teraflops research chip built using 65nm process technology that contained 80 cores, which Intel calls tiles due to the fact that they are very simplistic and hardly resemble modern central processing units’ cores, organized into 10x8 2D mesh network and operating at 4GHz clock-speed. Each tile consisted of a processing engine (PE) connected to a 5-port router with mesochronous interfaces, which forward packets between tiles. According to Intel, the 80-core chip has VLIW (very long instruction word) micro-architecture, which [on the architectural level] is generally similar to the latest processing engine of ATI’s code-named R600 graphics processing unit.

Even though Intel’s Larrabee project, which seems to have been underway for about two years already, still has no details, it can be expected that the processor will find its home in servers based on Intel’s common serial interconnect (CSI) bus. Those machines are set to include both Intel Itanium 2 and Intel Xeon processors, which do require a rapid computing engine, but hardly need a powerful graphics processing unit. In fact, Hewlett Packard (HP) discussed an integration of vector processing engine into the Itanium-series microprocessor back in the past.