by Ilya Gavrichenkov
08/15/2007 | 10:28 AM
We have known for a long time that the first 45nm Xeon processors from Penryn family will be available this year. Now we know a more specific date when these processors should appear in the market. The new Xeon CPUs for dual-socket systems based on the new improved 45nm core also known as Harpertown will be announced on November 11 2007. This information was reported today by our colleagues at Dailytech with a reference to Intel’s official documents.
<%BANNER[article]%>The first ones to hit the market will be the quad-core Xeon E54XX processors for dual-socket systems with the clock speeds ranging from 2.0 to 3.0GHz and about 80W TDP. They will also release an extreme Harpertown X5460 with 3.16GHz clock speed and 120W TDP. The power-efficient Harpertown modifications from the L series will launch only in Q1 2008.
The new 45nm quad-core Xeon E54XX processors will feature an L2 cache with the total capacity of 12MB (2x6MB). They will be designed to work with 1333MHz bus in existing Bensley platforms on Intel 5000P Express (Blackford) and Intel 5000V Express (Blackford-VS) chipsets.
Moreover, together with Harpertown they will also announce a new Cranberry Lake platform compatible with 45nm Xeon processors. This platform will use Intel 5100 (San Clemente) chipset and Registered DIMMs instead of FB-DIMMs.
The pricing of the upcoming Xeon E54XX processors will look as follows:
If we compare these prices with the recently reported pricing of the upcoming AMD Barcelona processors, we can see that AMD estimates the IPC of their upcoming solutions much more optimistically. The direct competitor to the upcoming Opteron 2350 with 1.9GHz clock speed will be the new Xeon E5420 working at 2.5GHz, and Xeon X5460 working at 3.16GHz will compete with Opteron 2358 running at 2.4GHz speed.
Intel’s Penryn processor family is the next evolution of the Core micro-architecture that made its debut with Woodcrest and Conroe processors. Penryn introduces a 45nm fabrication process with a few additional performance enhancements, such as larger L2 cache, for instance. The major micro-architectural improvements for new Penryn processors, besides SSE4 instruction set, include the so-called Unique Super Shuffle Engine and Radix 16 technique.