AMD Tapes Out First "Bulldozer" Microprocessors

AMD to Sample Bulldozer in 2H 2010

by Anton Shilov
07/16/2010 | 06:16 PM

Advanced Micro Devices, the world's second largest supplier of microprocessors, said that it had taped out the first central processing units (CPUs) based on the code-named Bulldozer core. The company hopes to begin sampling of the chips with customers shortly and initiate mass production sometimes in 2011.


"In the second quarter of this year we also taped out the first 32nm product based on our new high-performance Bulldozer CPU core. We plan to begin sampling our Bulldozer based server and desktop processors in the second half of this year and remain on track for 2011 launches. These new processors will deliver significant performance improvements to the AMD platform," said Dirk Meyer, chief executive officer of AMD, during the quarterly conference call with financial community.

The "tape out" means that the artwork for the photomask of a circuit is sent to manufacturing. It is unclear at this point whether AMD has already received samples of the Bulldozer processors back from manufacturing and assembling or at least manufactured wafers from Globalfoundries. Moreover, it is uncertain when exactly AMD submit the design of the chip to its foundry partner: back in April, or back in June? At present it takes weeks to manufacture a complex multi-layer chip, so, the timing of the tape out is really important for analysis.

According to an unofficial source familiar with AMD’s server plans, the chipmaker intended to commence mass production of certain versions of its Bulldozer-based code-named Interlagos microprocessors with 12 or 16 cores already in the first half of 2011. Other versions of the chips, e.g. with reduced power consumption or increased performance, were planned to be produced in the second half of the year.

While generally AMD formally unveils microprocessors when it begins mass production or revenue shipments of its chips, it is not set on stone that initiation of mass production means formal announcement. From the current point of view the information means that AMD has equal chances of launching its sixteen-core or twelve-core AMD Opteron “Interlagos” processors either in the first half of the year or in the second half of the year.

AMD Opteron 6000 “Interlagos” will be compatible with AMD’s Maranello server platform with G34 (1944-pin) sockets. It is expected that Interlagos features two code-named 32nm SOI Valencia chips with six or eight cores on the same piece of substrate.

Based on the information provided by AMD during its annual Analyst Day in November '09, the first Bulldozer chip code-named Zambezi (which belongs to Orochi family of desktop chips, according to the firm) will feature eight x86 processing engines with multithreading technology, two 128-bit FMAC floating point units, shared L2 cache, shared L3 cache as well as integrated memory controller. AMD also states that the new CPU will feature “extensive new power management innovations”. Based on the diagram that AMD demonstrated, the company intends to dramatically improve multithreading performance of its CPUs: two INT schedulers, an FP scheduler and separate data caches for each of four cores should do the job very well.