by Anton Shilov
08/03/2010 | 02:10 PM
Analysts and market observers have expected Advanced Micro Devices' code-named Bulldozer microprocessors to tangibly boost performance compared to the company's today's chips. But while from architectural standpoints Bulldozer looks impressive, the company itself does not make claims about extraordinary performance improvements. In fact, "per-core" performance of the new Bulldozer-based processors will be only slightly higher compared to contemporary chips.
"From a performance standpoint, if you compare our 16-core Interlagos to our current 12-core AMD Opteron 6100-series processors (code named “Magny Cours”) we estimate that customers will see up to 50% more performance from 33% more cores. This means we expect the per core performance to go in the right direction - up," explained John Fruehe, the director of product marketing for server/workstation products at AMD.
While "per core" performance of Bulldozer may not be that impressive, the new chip designs may allow AMD to clock the forthcoming microprocessors higher without increase of power consumption and heat dissipation or to pack more cores into the next-generation processors without any running into thermal problems.
Based on the information provided by AMD during its annual Analyst Day last November, the first Bulldozer micro-architecture desktop/workstation chip code-named Zambezi (which belongs to Orochi family, according to the firm) will feature eight x86 processing engines with a multithreading technology, two 128-bit FMAC floating point units, shared L2 cache, shared L3 cache as well as integrated memory controller. AMD also states that the new CPU will feature “extensive new power management innovations”. The new chips that belong to Bulldozer family will also support Advanced Vector Extensions (AVX) that support 256-bit FP operations. Based on a diagram that AMD demonstrated in the past, the company intends to dramatically improve multithreading performance of its CPUs with the help of two INT schedulers, an FP scheduler and separate data caches for each of four cores should do the job very well.
In the second quarter of calendar 2010 the world's second largest supplier of central processing units taped out the first Bulldozer microprocessors. The "tape out" means that the artwork for the photomask of a circuit is sent to manufacturing. While it is unclear at this point whether AMD had already received samples of the Bulldozer processors back from manufacturing and assembling or at least manufactured wafers from Globalfoundries, given that the company on Tuesday made the first Bulldozer performance-related statements, it is likely that the firm has first samples at hands.