AMD Drops Support of 3DNow! Instructions

AMD's Future Chips Will Not Support 3DNow!

by Anton Shilov
08/19/2010 | 11:20 PM

Advanced Micro Devices introduced the 3DNow!  instruction set back in the K6-2 days to perform single instruction multiple data (SIMD) instructions, otherwise known as vectorized instructions. The 3DNow! was meant to greatly improve performance of floating point operations, but not a lot of programs actually took advantage of the instruction sets. As a result, over a decade later AMD decided to pull the plug and its future chips will not support 3DNow!


"[Since the introduction of 3DNow!], we have added many SIMD instruction sets to our processors, such as the widely used Streaming SIMD Extensions (SSE) instruction set and its successive versions. 3DNow! instructions are being deprecated and will not be supported in certain upcoming AMD processors. In those processors, the 3DNow! Instructions feature flag bit will not be set," wrote Sharon Troia, senior developer relations engineer.

Around the same time as 3DNow! instructions were developed, programmers were accustomed to using a model of ‘try and catch’ to check if a processor supported an instruction or instruction set.  This is when the application ‘tries’ to execute an instruction to see if it’s available. If the application receives an Undefined Exception (#UD) from the processor, it believes the instruction set isn’t available. These types of applications may not do well under newer virtual machines.  That’s subject for another blog though.

The 3DNow! versions of the PREFETCH and PREFETCHW instructions are now in a class of their own and AMD plans to continue to support them.

It is most likely that mainstream applications have non-3DNow! code path to take, such as an SSE path.