Intel Could Make a Thousand-Core Microprocessor.

Intel's SCC Could Scale to 1000 Cores

by Anton Shilov
11/25/2010 | 08:04 PM

In theory, Intel's experimental 48-core single chip cloud computer (SCC) microprocessor can scale to a thousand of cores, one of the company's researcher said. Moreover, all those cores could work pretty efficiently. The only question is whether such a chip is feasible from power consumption and economy points of view.


"The architecture for the SCC processor is arbitrarily scalable. This is an architecture that could, in principle, scale to 1000 cores. I can just keep adding, adding, adding cores said Intel researcher Timothy Mattson, during a talk at the SC10 conference earlier this month, reports IDG News Service.

According the researcher, the mesh network which connects SCC's processing elements between each other will become inefficient only with more than one thousand of cores. Naturally, even though there are no direct confirmations from Intel about that, a network connecting hundreds of clients would also become very power hungry. Moreover, input/output functionality of a thousand-core SCC would be completely different from the current logic.

The prototype chip contains 24 tiles with two x86 cores per each, which results in 48 cores – the largest number ever placed on a single piece of silicon. Each core can run a separate OS and software stack and act like an individual compute node that communicates with other compute nodes over a packet-based network. Every core sports its own non-coherent L2 cache and each tile sports a special router logic that allows tiles to communicate with each other using a 24-router mesh network with 256GB/s bisection bandwidth. There is no hardware cache coherence support among cores in order to simplify the design, reduce power consumption and to encourage the exploration of datacenter distributed memory software models on-chip. Each tile (2 cores) can have its own frequency, and groupings of four tiles (8 cores) can each run at their own voltage. The processor sports four integrated DDR3 memory controllers, or one controller per twelve cores.

Back in the past Intel already introduced a research processor with 80-cores, but that chip, unlike SCC, even did not reach any researchers outside the company. The first research processor of Intel's Tera-Scale research project had performance of 1.6TFLOPS SP at 5GHz clock-speed.