by Anton Shilov
01/21/2011 | 06:00 PM
Advanced Micro Devices this week again reiterated its roadmap for chips to be made using 32nm silicon-on-insulator (SOI) gate-first high-K metal gate (HKMG) process technology. The interim chief exec promised to launch code-named Llano accelerated processing units in Q2 2011, but to delay the highly-expected Bulldozer chips to "summer".
"We have entered a new phase with our 32nm ramp and are now sampling thousands of Llano products to a wide variety of OEMs and ODMs as they prepare for production in Q2," said Thomas Seifert, interim chief executive officer of AMD, during a conference call with financial analysts.
Back in early November it was, reported citing unofficial sources, that AMD would commence commercial manufacturing of code-named Llano accelerated processing units (APUs) for desktops and mobiles in July '11, which is Q3 2011.
Meanwhile, microprocessors with Bulldozer micro-architecture were supposed to hit the mass production sometime in April '11, according to unofficial sources.
"We have begun sampling our 32nm Bulldozer-based Orochi parts in volume with customers worldwide. We expect Orochi for desktops to ship in production in early summer and the Orochi for servers in late summer," said Thomas Seifert, interim chief executive of AMD.
The CEO confirmed that the company had started to ship samples of its microprocessors based on the Bulldozer micro-architecture to customers "in volume". While sampling seems to be on relative schedule, the precise roadmap outlined by the company means delays with mass availability of the chips.