Microsoft Calls for Ultra Low-Power Sixteen-Core x86 Server SoCs

Microsoft Endorses Low-Power x86, Dismisses ARM for Servers

by Anton Shilov
01/27/2011 | 09:52 PM

Microsoft Corp. believes that companies like Advanced Micro Devices and Intel Corp. should develop very highly-integrated multi-core system-on-chips based on low-power micro-architectures aimed at servers to address the needs of data centers of the future. At the same time, the company believes that ARM architectures will not be competitive against x86 in the server space in the coming years.


Dileep Bhandarkar, a distinguished engineer at Microsoft responsible for server hardware architecture and standards for global foundation services, said at Linley Data Center Conference that AMD and Intel should develop server-class SoCs with sixteen low-power x86 cores, integrated memory controller and all the I/O functionality. For example, the two leading designers of x86 cores could use Atom- or Bobcat-like cores to create such system-on-chip products.

"There is a huge opportunity using these smaller cores to be more energy efficient, and we are talking to both AMD and Intel [about that]," said Mr. Bhandarkar, reports EETimes web-site.

Both AMD and Intel have said already that they were looking forward various opportunities to utilize Atom and Bobcat micro-architectures in the server space. It is natural that at present both designs are more tailored for client computers rather than for server systems, therefore, nobody knows how exactly would an SoC with many low-power x86 cores perform and how high its power consumption will be once all the server-specific features (ECC, appropriate cache sizes and memory support, etc.) are included.

AMD's Bobcat core consumes less than 4.5W at 1GHz  and less than 9W at 1.6GHz, whereas its modern K10.5 core with all the server specifics included consumes less than 5.83W at 1.8GHz, which means that Bobcat in its current form may not be exactly the best chip for cloud datacenters of the future.

"We will continue to evaluate and define our product roadmap to ensure we have the right products for the future. We are analyzing both “Bulldozer” and “Bobcat” core design points for future SoC’s (system-on-chip) targeting the cloud server space," said John Fruehe, the director of product marketing for server, embedded and FireStream products at AMD.

But while developers of central processing units (CPUs) have doubts about which x86 micro-architecture to use, the engineer from Microsoft seems to know what architecture should not be used: ARM. Performance that ARM-based microprocessor offer makes Mr. Bhandarkar rather unenthusiastic about ARM'is ability to compete in the server space.

"I have been involved in instruction-set architecture transitions multiple times, and they are extremely painful. The rule of thumb is to make that kind of change you have to have at least a sustainable 2x performance improvement per dollar or per watt, and ARM is not there. ARM is interesting to look at, and if it lights a fire under Intel and AMD that makes us happy," said Mr. Bhandarkar.

It is noteworthy that Dileep Bhandarkar did not touch upon GPG-accelerated solutions for data centers, which are developed by AMD, Intel and Nvidia Corp., as well as heterogeneous multi-core microprocessors, which are developed by AMD and Nvidia.

Mr. Bhandarkar was director of advanced architecture in the CTO office of Intel’s digital enterprise group and a lead spokesperson for evangelizing Intel server platform technologies to the industry; he held several director-level positions related to CPU and platform architecture, and strategic planning over a 12 year career at Intel. He was instrumental in driving the strategic decision to implement AMD-compatible 64-bit x86 architecture at Intel, and pioneered the adoption of energy efficient microprocessor cores across Intel’s product line. Prior to joining Intel in 1995, he spent almost 18 years at Digital Equipment Corp., where he managed processor and system architecture, and performance analysis work related to the VAX, Prism, MIPS, and Alpha architectures.